Verilog Jobs in Bangalore (Bengaluru)
JD for Circuit design:
- Design CMOS/FinFet-based analog and mixed-signal integrated circuits independently / under the supervision of a lead engineer.
- Hands-on experience with min. 2-3 analog circuit design IP from SPEC to final GDS delivery.
- Support analog/mixed-signal IP validation from pre-layout, post-layout till post-tape out phase
- Hands-on with state-of-the-art CAD tools and flows required for simulation, verification, and reliability checks.
- Knowledge of layout issues; especially in FinFet nodes
- Document design ideas and simulation results as per SPEC/design guidelines
- 3-6+ years of industry experience in the area of mixed-signal CMOS circuit design
- Able to create new analog behavioral models (WREAL / Verilog AMS) and/or update existing ones
- Experience with System Verilog and UVM Methodology
- Innovative and creative thinker
- Ability to quickly ramp up on new projects
- Working knowledge of PERL, TCL and UNIX shell scripting language
Extensive hands on and teaching experience on Digital / SV /UVM/ Verilog / VHDL /DFT tools
Extensive experience in Back-end design
Experience on Mentor Graphics EDA flow is an added advantage
Responsible for development and support of Projects.
Responsible for Debugging the source codes in Verilog, SV, and UVM.
Responsible for Training Delivery and Support
Desired Candidate Profile
Sound Knowledge on Digital / Verilog / VHDL / SV / UVM / DFT / Back-end design
3 to 8 years industry/teaching experience
Good communication skill
1.SV, UVM, USB, DDR, PCIE, Ethernet, Axi, MIPI. Any one of the protocols will
be added advantage.
2.Experience in verification of complex IPs or SoCs.
3. Expertise in SoC Verification using C and SV/UVM.Expertise in AMBA
4. AXI/AHB/APB and experience in working with ARM Processors.
5. Expertise in Test Plan creation and Verification technologies like Code
Coverage, Functional Coverage and Assertions.