Job Description
Extensive hands on and teaching experience on Digital / SV /UVM/ Verilog / VHDL /DFT tools
Extensive experience in Back-end design
Experience on Mentor Graphics EDA flow is an added advantage
Responsible for development and support of Projects.
Responsible for Debugging the source codes in Verilog, SV, and UVM.
Responsible for Training Delivery and Support
Desired Candidate Profile
Sound Knowledge on Digital / Verilog / VHDL / SV / UVM / DFT / Back-end design
3 to 8 years industry/teaching experience
Good communication skill
Shubham Vishwakarma
Full Stack Developer - Averlon
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GUVI (Grab Your Vernacular Imprint) Geek Network Private Limited is an Online Learning Platform incubated by IITM and IIM-A, and supported by Google Launchpad & Jio Gennext .
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Role: Author
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Location: Remote
Course name: Embedded C
Specialization: Subject Matter Expert
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Follow CutshortShubham Vishwakarma
Full Stack Developer - Averlon