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About the organization
QFocus AI Pvt. Ltd. (QFAI), a wholly owned subsidiary of QFocus Technologies LLC, is a consulting-led engineering services company with sharp focus on supporting next gen advanced products development across AI/ML, Compute, Communication, Storage and Consumer Electronics. Our mission is to help our customers deliver cutting-edge products on time ensuring world-class quality.
Why Join QFAI? Join a passionate team, dedicated to making a difference.
We are a close-knit team, with strong mission, vision and values that guide our day-to-day. Recognition of work, respect, and our multicultural community are key aspects of the employee experience and contribute to our continued success. Would you like to be part of our story? Don't hesitate, come and join us!
About this opportunity – Formal Verification Engineer
We are seeking a highly skilled and passionate Formal Verification Engineer to join our team working with the best in the Industry, developing innovative ASIC solutions for data center and AI Infrastructure. The ideal candidate will develop comprehensive formal test plans and be responsible for complete formal verification sign-off of single or multiple complex blocks. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success.
Key Responsibilities:
· Contribute to Formal Verification applying and evangelizing state of the art Formal Verification Methodologies across IP-level, subsystem-level and SOC Level.
· Collaborate with Architecture and Design teams to develop formal specifications and implementations.
· Define formal verification scope, create formal environments, and achieve coverage sign-off using targeted formal verification techniques.
· Develop comprehensive formal test plans, including unique security requirement verification.
· Build reusable and scalable formal verification environments and deploy relevant tools.
· Evaluate and recommend EDA solutions for Formal Verification and drive improvements to methodologies and flows.
· Debug complex issues in RTL designs based on formal results and contribute to design improvements.
Required Skills:
- Strong hands-on experience with Formal Verification tools (e.g., JasperGold, VC-Formal, Questa Formal).
- Experience writing formal properties using System Verilog Assertions (SVA) or Property Specification Language (PSL).
- Proven understanding of Formal Verification methodologies, complexity reduction techniques, and abstraction techniques.
- Fluency in hardware description languages, such as SystemVerilog.
- Proficiency in scripting languages such as Python, Perl, or Tcl within Unix/Linux environments.
Education:
Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field, or equivalent practical experience.
Experience:
5+ years of experience in Design Verification, with at least 1 year in Formal Verification.
QFocus AI Pvt Ltd is an Equal Employment Opportunity employer.
1.SV, UVM, USB, DDR, PCIE, Ethernet, Axi, MIPI. Any one of the protocols will
be added advantage.
2.Experience in verification of complex IPs or SoCs.
3. Expertise in SoC Verification using C and SV/UVM.Expertise in AMBA
protocols
4. AXI/AHB/APB and experience in working with ARM Processors.
5. Expertise in Test Plan creation and Verification technologies like Code
Coverage, Functional Coverage and Assertions.
- Essential Skills and Experience
- Experience in designing and implementing verification environments for complex RTL designs
- Well-versed in the use of hardware verification languages e.g. SystemVerilog or Specman e
- Verification methodologies such as UVM
- Understanding of end-to-end verification processes, from test plan creation through to verification closure
- Ability to quickly understand and apply complex specification detail
- Understanding of the fundamentals of computer architecture, with an emphasis on pipelining, exception handling, memory systems
- Practical experience of working on microprocessor designs
- In-depth understanding of memory protection, memory translation, vector processing in CPUs, exception and interrupt handling.
- Understanding of constrained random stimulus, the goals and general usefulness of different types of coverage in hardware, as well as checking methodologies and behavioral functional models.
- Knowledge of assembly language (preferably Arm), and/or C/C++
- In-depth technical reviewing of others work
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