Sr Lead / Principal Engineer [FPGA Verification] - For NRI's

Responsibilities

 Develop an effective test suite based on the FPGA requirements.

 Testbench architecture with System Verilog and UVM

 Develop test environments based on the architecture.

 Develop Agents, Drivers, Monitors, Predictors, Scoreboard, and Sequences etc.

 Actively participate in a team environment, working with verification,

architecture, applications, and design teams to develop comprehensive

verification plans and address issues.

 Verification environment development/update for block level and system level.

 Own and drive verification related activities, provide technical support, and

proactively manage tasks to meet schedule goals.

 Define and develop effective functional assertions and coverpoints

 Debug the design issues and report through appropriate tools

 Code Coverage analysis and test case identification for improving the code

coverage.

 Perform timing simulations.

 Apply techniques and skills required to identify a root cause of a given issue and

very good debugging skills.

 Technical guidance to the junior engineers on verification tasks.

Qualifications

 Bachelor's/Master's degree in Engineering (Electronics and Communication or

VLSI )

 10+ years of Industry experience in development, integration & verification of

ASIC/FPGA.

 Protocols – PCIe, SPI, ARINC 429, Mil 1553, Image processing or similar.

 Hands on experience in developing System Verilog/UVM verification

environment from scratch.

 Hands on experience with Questa or similar advanced simulation tools.

 Hands on experience in DO-254 verification process.

 Experience in DOORS/Jama will be a plus.

 Experience in Video domain will be a plus.