Smart Soc Solutions
http://www.smartsocs.com/About
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1.SV, UVM, USB, DDR, PCIE, Ethernet, Axi, MIPI. Any one of the protocols will
be added advantage.
2.Experience in verification of complex IPs or SoCs.
3. Expertise in SoC Verification using C and SV/UVM.Expertise in AMBA
protocols
4. AXI/AHB/APB and experience in working with ARM Processors.
5. Expertise in Test Plan creation and Verification technologies like Code
Coverage, Functional Coverage and Assertions.

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Physical Design - JD
Experience: 2-20 yrs
1.Strong background of ASIC Physical Design: Floor planning, P&R, Extraction, IR Drop Analysis, Static Timing and Signal Integrity.
2.Hands-on experience on technology nodes like 7nm, 14nm, 10nm.
3.Good knowledge of EDA tools from Synopsys , Cadence and Mentor
4.Hands-on experience in floor planning, placement optimizations, CTS and routing.
5.Hands-on experience in cadence or Synopsys tool (Encounter, ICC, PT/PTSI, TEMPUS, DC, RC, VOLTAS)

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alog Circuit Design::
- The candidate should have B.Tech or M.Tech in Electronics/Electrical/VLSI Design Engineering
- The candidate should have relevant work experience of 7-16 years in Analog and SERDES IO IP design e.g. GPIOs, Thermal Sensor, PLL, ADC/DAC/ Voltage regulators/LDOs, AIB, HBMIO, DDR, HDMI/DP IO, MIPI IO etc.

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2.Hands-on experience on technology nodes like 7nm, 14nm, 10nm.
3.Good knowledge of EDA tools from Synopsys , Cadence and Mentor
4.Hands-on experience in floor planning, placement optimizations, CTS and routing.
5.Hands-on experience in cadence or Synopsys tool (Encounter, ICC, PT/PTSI, TEMPUS, DC, RC, VOLTAS)

The recruiter has not been active on this job recently. You may apply but please expect a delayed response.

Requirements:-
- Must have good understanding of Python and Shell scripting with industry standard coding conventions
- Must possess good coding debugging skills
- Experience in Design & Development of test framework
- Experience in Automation testing
- Good to have experience in Jenkins framework tool
- Good to have exposure to Continuous Integration process
- Experience in Linux and Windows OS
- Desirable to have Build & Release Process knowledge
- Experience in Automating Manual test cases
- Experienced in automating OS / FW related tasks
- Understanding of BIOS / FW QA is a strong plus
- OpenCV experience is a plus
- Good to have platform exposure
- Must have good Communication skills
- Good Leadership capabilities & collaboration capabilities, as individual will have to work with multiple teams and single handedly maintain the automation framework and enable the Manual validation team

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