Cutshort logo
Alten calsoft labs's logo

d

Alok Tiwari's profile picture
Posted by Alok Tiwari
3 - 15 yrs
₹5L - ₹24L / yr
Bengaluru (Bangalore), Bengaluru (Bangalore)
Skills
uvm
systemverilog
rtl
semiconductor
cdc
lint
Verilog
VLSI
ALTEN Calsoft Labs expertise in VLSI services can transfer your product ideas into cost-effective System on Chip (SoC) designs for Networking, Mobile Multimedia and Consumer Electronics solutions with a faster time to market. Some of the key highlights of our Semiconductor Practice include - Multiple engagements with Tier-1 silicon vendors and fabless semiconductor companies from Spec-to-Netlist Focus on latest verification methodologies - OVM, VMM and UVM Verification & validation experience of complex SOC designs up to 28 nm process technology Expertise in implementing complex ASICs in 130nm, 90nm, 65nm & 40nm
Read more
Users love Cutshort
Read about what our users have to say about finding their next opportunity on Cutshort.
Shubham Vishwakarma's profile image

Shubham Vishwakarma

Full Stack Developer - Averlon
I had an amazing experience. It was a delight getting interviewed via Cutshort. The entire end to end process was amazing. I would like to mention Reshika, she was just amazing wrt guiding me through the process. Thank you team.
Companies hiring on Cutshort
companies logos

About Alten calsoft labs

Founded :
2013
Type :
Services
Size :
100-1000
Stage :
Profitable

About

ACL Digital is a design-led Digital Experience, Product Innovation, Solutions, and Consulting offerings leader. From strategy, to design, implementation, and management we help accelerate innovation and transform businesses. Keeping customer journeys and design at the core, it is committed to enable large Enterprises, SMBs and start-ups to transform. A pioneer in delivering Business Innovation, Integration and Transformation through disruptive technologies, ACL Digital brings in competitive advantage, innovation, and fresh perspectives to business challenges. With a multi-cultural and transnational talent and as part of the ALTEN Group comprising over 50000+ employees spread across more than 30 countries, it promotes a collaborative knowledge-building environment.
Read more

Connect with the team

Profile picture
Alok Tiwari
Profile picture
Lokesh B
Profile picture
Vishakh c

Company social profiles

bloglinkedin

Similar jobs

QAgile Services
at QAgile Services
1 recruiter
Radhika Chotai
Posted by Radhika Chotai
Remote, Chennai
6 - 9 yrs
₹5L - ₹18L / yr
FPGA
RTGL
Mechanical engineering
Hardware
Xilinx
+9 more

8+ years

Domain skills

•    Expert in FPGA flows with Xilinx, including compilation, synthesis, debug, performance and implementation of advanced features

•    Good Hands on Linting, Static Timing Analysis, Equivalence Checking & Clock Domain Crossing.

•    Experience in developing verification environment to verify developed items using self-checking test benches, BFMs, checkers/Monitors & Score boards using VHDL/verilog.

•    Prior experience in integrating Nios, MPIS, MicroBlaze, ARM Cortex, etc. GTX / GTH transceivers & 10GE MAC / DMA controller / PCIe Gen3 / CPRI / JESD / FFT IP core

•    Common control interfaces design, like AMBA AXI, UART, SPI, I2C, DDR, Ethernet, USB, etc..

•    Knowledge on programming languages such as Verilog, VHDL and system Verilog

•    Experience with any scripting language for automation (Perl/TCL/Python).

•    Familiar with standard FPGA HW bring-up activities and testing

•    Experience with HW measuring tools like oscilloscopes, Signal analysers, JTAG Emulators


Read more
Nexatom Research and Instruments Pvt Ltd
Remote, Bengaluru (Bangalore)
3 - 10 yrs
₹12L - ₹25L / yr
VHDL
Digital electronics
Analog And Digital Circuits
Electronics
Analog electronics
+3 more

Responsibilities

• End-to-End Embedded/DSP system design.

• Complex logic implementation using RTL coding techniques (preferably VHDL and HLS)

• Able to implement various complex algorithms and curve fitting/Neural network based algorithms inside the FPGA hardware.

• Writing modular RTL codes and design techniques using IPs.

• Simulating the design at various stages of development.

• CDC, STA, area/power optimizations, floor planning, linting.

• Interfacing high speed ADCs/DACs using state of the art data transfer links to FPGA.

• Using DDR RAM and SG-DMA for low latency, high-speed data transfer.

• Familiarity with high-speed communication systems viz. USB 3, PCIe, Gbe, 10 Gbe, 100

Gbe etc.

• Linux device driver development.


Skills

• VHDL/Verilog, C/C++, familiar with Xilinx development tools.

• Design knowledge of PCIe, LVDS, SPI, AXI, USB etc. interfaces.

• Ability to design using primitives instead of inferred design from RTL.

• Embedded linux device drivers, petalinux, exposure to yocto project.

• Exposure to various compression algorithms.


Desired Qualification/Experience

• Talent and zeal to work with new challenging system designs.

• Thorough understanding of digital systems.

• Hands-on experience on the RTL design, preferably with a repository of previous

projects

Read more
Avantel Limited
at Avantel Limited
2 candid answers
Kousik Bonda
Posted by Kousik Bonda
Hyderabad, Visakhapatnam
5 - 10 yrs
₹20L - ₹30L / yr
Embedded C
Microcontrollers
RTL
FPGA
UART
+5 more
  1. Coding and Debugging in C language.
  2. Knowledge on ARM based architectures of 8/16/32 Microcontrollers,UART, ADC, DAC,Ethernet, SPI,CAN,I2C and I2S.
  3. FPGA RTL coding and Simulation using Verilog/VHDL


Qualification - BE/B.Tech (ECE), M.Sc.(Electronics)


Only Defense and Aerospace, Electronics, Semi-Conductors,

(No Automative industry)


AVANTEL LIMITED is a technology driven public limited company with focus on developing innovative wireless communication products and solutions to meet unique requirements of defense, railways, and telecom sectors. The organization is certified against AS 9100D and ISO 9001:2015 standards for Quality Management System. For more details visit www.avantel.in.

Read more
Samniya Techsys
Jaganmohan Karla
Posted by Jaganmohan Karla
Remote only
5 - 7 yrs
₹1L - ₹35L / yr
VLSI
RTL
EMIR

Job Description :

 

Own partition floorplanning for optimizing blocks for Power, Performance and Area.

Own execution from synthesis to place and route of partitions through all signoff including timing signoff, physical verification, EMIR signoff , Formal Equivalence, and Low Power Verification.

Have close collaboration with RTL team to help drive and resolve design issues related to block closure.

Understand tools, flows, and overall design methodology in design construction, signoff, and optimization with a data driven approach.

Implement robust clock distribution solutions using appropriate methods that meet design requirements.

Make good independent technical trade-offs between power, area, and timing (PPA)

Read more
Collins Aerospace
Bengaluru (Bangalore)
8 - 15 yrs
₹15L - ₹15L / yr
FPGA
UVM
Verilog
OVM
DO-254

Responsibilities

 Develop an effective test suite based on the FPGA requirements.

 Testbench architecture with System Verilog and UVM

 Develop test environments based on the architecture.

 Develop Agents, Drivers, Monitors, Predictors, Scoreboard, and Sequences etc.

 Actively participate in a team environment, working with verification,

architecture, applications, and design teams to develop comprehensive

verification plans and address issues.

 Verification environment development/update for block level and system level.

 Own and drive verification related activities, provide technical support, and

proactively manage tasks to meet schedule goals.

 Define and develop effective functional assertions and coverpoints

 Debug the design issues and report through appropriate tools

 Code Coverage analysis and test case identification for improving the code

coverage.

 Perform timing simulations.

 Apply techniques and skills required to identify a root cause of a given issue and

very good debugging skills.

 Technical guidance to the junior engineers on verification tasks.

Qualifications

 Bachelor's/Master's degree in Engineering (Electronics and Communication or

VLSI )

 10+ years of Industry experience in development, integration & verification of

ASIC/FPGA.

 Protocols – PCIe, SPI, ARINC 429, Mil 1553, Image processing or similar.

 Hands on experience in developing System Verilog/UVM verification

environment from scratch.

 Hands on experience with Questa or similar advanced simulation tools.

 Hands on experience in DO-254 verification process.

 Experience in DOORS/Jama will be a plus.

 Experience in Video domain will be a plus.

Read more
maven silicon
at maven silicon
2 recruiters
Shravani S
Posted by Shravani S
Bengaluru (Bangalore)
1 - 8 yrs
₹2.5L - ₹7L / yr
teach
training
Very Large Scale Integration (VLSI)
Verification and validation
VHDL
+1 more

 

Job Description

Extensive hands on and teaching experience on Digital / SV /UVM/ Verilog / VHDL /DFT tools

Extensive experience in Back-end design

Experience on Mentor Graphics EDA flow is an added advantage

Responsible for development and support of Projects.

Responsible for Debugging the source codes in Verilog, SV, and UVM.

Responsible for Training Delivery and Support

 

Desired Candidate Profile

Sound Knowledge on Digital / Verilog / VHDL / SV / UVM / DFT / Back-end design

3 to 8 years industry/teaching experience

Good communication skill

Read more
Espressif Systems India Pvt Ltd
Remote, Pune
3 - 10 yrs
₹15L - ₹30L / yr
Verilog
skill iconC
SystemVerilog
VMM
UVM
+3 more
Digital Verification Engineer About Company: Espressif Systems is a multinational, fabless semiconductor company established in 2008, with headquarters in Shanghai and offices in Greater China, India and Europe. We have a passionate team of engineers and scientists from all over the world, focused on developing cutting-edge WiFi-and-Bluetooth, low-power, IoT solutions. Among our popular products are the ESP8266 and ESP32 series of chips, modules and development boards. Job Description 1. Develop verification programs and define the verification environment according to design documentation, in order to conduct module- to chip-level verification; 2. Perform regression tests to improve verification coverage; 3. Assist the FPGA and software teams in FPGA prototype testing; 4. Collaborate with chip design engineers to find and fix any design defects; 5. Ensure the integrity of chip designs by supervising the design department when building verifiable design processes; 6. Carry out door-level simulation, with UPF verification methodology, to ensure successful chip tapeout. Job Prerequisites 1. Bachelor’s degree, or above, in Computer Engineering/Electronic Engineering/Communications Engineering, or other related disciplines; 2. 5+ years of work experience; 3. Familiarity with SoC and communication theory; 4. Familiarity with Verilog, proficiency in C/System Verilog verification; 5. Proficiency in Perl/Shell/Tcl scripts; 6. Experience in FPGA verification and/or chip tapeout is a plus; 7. Familiarity with VMM/UVM is a plus.
Read more
Young Minds Technology Solutions Pvt Ltd
Venkat Sai Narayan
Posted by Venkat Sai Narayan
Tirupati
0 - 2 yrs
₹1.2L - ₹3L / yr
Very Large Scale Integration (VLSI)
RTL
Verilog
Analog electronics
Application Specific Integrated Circuit (ASIC)
+1 more

Skills/Experience


Experience with complete flows involving timing closure of high speed digital design using scripting languages and design automation.


Has deep knowledge of Xilinx FPGA implementation and tools.


Experience in state of the art tools and flows.


Working knowledge in Verilog and System Verilog.

 Job Requirements

 

Bachelors in Electronics Engineering.

 

Strong knowledge of ASIC and/or FPGA design methodology and should be well versed in front-end design, simulation, and verification CAD tools.

 

Relevant FPGA/ASIC engineering design and verification experience is entertained.

 

Excellent verbal, written and communication skills are required.

 

Excellent follow-through, motivation, and persistence

 

Strong technical judgment and decision making abilities.

 

Knowledge of digital board design and signal integrity principles is a plus.

Read more
Swedium Global Services
at Swedium Global Services
2 recruiters
Vaishak Asok
Posted by Vaishak Asok
sweden
8 - 12 yrs
₹10L - ₹35L / yr
Application Specific Integrated Circuit (ASIC)
uvm
asic
system verilog
Job description: A strong experience in block design and IP verification within digital ASIC. Good experience in SystemVerilog and UVM Methodology based verification Minimum of 5+ Years of ASIC Verification experience Good command on English both in written and spoken, Swedish language knowledge is an advantage You should have Positive attitude, social skills, a desire to help team members, structured way of working and an eye for quality work. You enjoy working both independently and in a small diverse and you are focused on reaching result on time. The work will be carried out in a cross functional team using Scrum/Agile ways of working Skills Required: Design verification Skills Miscellaneous tasks in connection to the block design Verification planning Verification specification Verification environment (creation/adaptation/maintenance). Verification documentation Test case creation Usage of reference models Constrained random testing Creation of Coverage matrix
Read more
Swedium Global Services
at Swedium Global Services
2 recruiters
harshini talla
Posted by harshini talla
SWEDEN, FINLAND
5 - 12 yrs
₹15L - ₹30L / yr
Application Specific Integrated Circuit (ASIC)
VLSI
Verilog
SV
UVM
+1 more
Job description: A strong experience in block design and IP verification within digital ASIC. Good experience in SystemVerilog and UVM Methodology based verification Minimum of 5+ Years of ASIC Verification experience Good command on English both in written and spoken, Swedish language knowledge is an advantage You should have Positive attitude, social skills, a desire to help team members, structured way of working and an eye for quality work. You enjoy working both independently and in a small diverse and you are focused on reaching result on time. The work will be carried out in a cross functional team using Scrum/Agile ways of working Skills Required: Design verification Skills Miscellaneous tasks in connection to the block design Verification planning Verification specification Verification environment (creation/adaptation/maintenance). Verification documentation Test case creation Usage of reference models Constrained random testing Creation of Coverage matrix Experienced in WCDMA, GSM and/or LTE systems.
Read more
Why apply to jobs via Cutshort
people_solving_puzzle
Personalized job matches
Stop wasting time. Get matched with jobs that meet your skills, aspirations and preferences.
people_verifying_people
Verified hiring teams
See actual hiring teams, find common social connections or connect with them directly. No 3rd party agencies here.
ai_chip
Move faster with AI
We use AI to get you faster responses, recommendations and unmatched user experience.
21,01,133
Matches delivered
37,12,187
Network size
15,000
Companies hiring
Did not find a job you were looking for?
icon
Search for relevant jobs from 10000+ companies such as Google, Amazon & Uber actively hiring on Cutshort.
companies logo
companies logo
companies logo
companies logo
companies logo
Get to hear about interesting companies hiring right now
Company logo
Company logo
Company logo
Company logo
Company logo
Linkedin iconFollow Cutshort
Users love Cutshort
Read about what our users have to say about finding their next opportunity on Cutshort.
Shubham Vishwakarma's profile image

Shubham Vishwakarma

Full Stack Developer - Averlon
I had an amazing experience. It was a delight getting interviewed via Cutshort. The entire end to end process was amazing. I would like to mention Reshika, she was just amazing wrt guiding me through the process. Thank you team.
Companies hiring on Cutshort
companies logos