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Role: FPGA Design & Validation Engineer

Location: Kokapet, Hyderabad

Work Mode: Work from Office – 5 days/week

Key Requirements

• 5+ years of relevant experience in FPGA Design and Validation
• Hands-on experience validating FPGA designs on physical boards
• Experience with board-level debugging and hardware bring-up
• Hands-on experience using Oscilloscopes for hardware/debugging activities
• Experience with TCL scripting
• Good understanding of Lint and CDC (Clock Domain Crossing)
• Experience with Spirent or other traffic generator tools is an added advantage
• Knowledge of AI Agents and Prompt Engineering is a plus

The ideal candidate would have a combination of FPGA design, board-level validation, hardware debugging and lab testing experience.

1. Coding and Debugging in C language.
2. Knowledge on ARM based architectures of 8/16/32 Microcontrollers,UART, ADC, DAC,Ethernet, SPI,CAN,I2C and I2S.
3. FPGA RTL coding and Simulation using Verilog/VHDL

Qualification - BE/B.Tech (ECE), M.Sc.(Electronics)

Only Defense and Aerospace, Electronics, Semi-Conductors,

(No Automative industry)

AVANTEL LIMITED is a technology driven public limited company with focus on developing innovative wireless communication products and solutions to meet unique requirements of defense, railways, and telecom sectors. The organization is certified against AS 9100D and ISO 9001:2015 standards for Quality Management System. For more details visit www.avantel.in.

Responsibilities will include, but are not limited to:

• Contribute to new Memory based product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic circuits
• Responsible to translate system-level specs onto the circuit block-level performance spec, circuit architecture, design and development
• Perform verification processes with modeling and simulation using industry-standard simulators
• Document and review final results
• Chip in to cross-group communication to work towards standardization and group success
• Actively solicit guidance from Standards, CAD, modeling, and verification groups to ensure the design quality

Successful candidates for this position will have:

• A Bachelor's or Master's degree (Preferred) in Electrical Engineering, Computer Engineering, or related discipline
• Proven knowledge of CMOS Circuit Design
• Experience in RTL design, design synthesis, static timing analysis, and automated layout techniques
• Hands-on experience with Verilog modeling and simulation tools
• Knowledge of state machine logic/design verification techniques
• Excellent problem-solving and analytical skills
• Experience with a scripting language (Python, Tcl, Perl, etc)