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FPGA Design & Validation Engineer
at ABC
FPGA Design & Validation Engineer

FPGA Design & Validation Engineer at ABC · Hyderabad · 3 - 8 years · ₹1L - ₹25L / yr · Profitable · Posted 14 Aug 2026

Majoris Technologies's logo

FPGA Design & Validation Engineer

at ABC

Agency job
3 - 8 yrs
₹1L - ₹25L / yr
Hyderabad
Skills
RTL
FPGA
Verification and validation
design

Role: FPGA Design & Validation Engineer


Location: Kokapet, Hyderabad

Work Mode: Work from Office – 5 days/week


Key Requirements

  • 5+ years of relevant experience in FPGA Design and Validation
  • Hands-on experience validating FPGA designs on physical boards
  • Experience with board-level debugging and hardware bring-up
  • Hands-on experience using Oscilloscopes for hardware/debugging activities
  • Experience with TCL scripting
  • Good understanding of Lint and CDC (Clock Domain Crossing)
  • Experience with Spirent or other traffic generator tools is an added advantage
  • Knowledge of AI Agents and Prompt Engineering is a plus

The ideal candidate would have a combination of FPGA design, board-level validation, hardware debugging and lab testing experience.

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About ABC

Founded :
2017
Type :
Services
Size :
0-20
Stage :
Profitable

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I had an amazing experience. It was a delight getting interviewed via Cutshort. The entire end to end process was amazing. I would like to mention Reshika, she was just amazing wrt guiding me through the process. Thank you team.
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