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C
CInternship Opportunity – Embedded Systems & IoT
Join our hands-on internship program designed for engineering students passionate about core tech. You'll work on real-time projects involving microcontrollers, sensors, RTOS, circuit design, and IoT protocols.
Gain exposure to AI-integrated embedded applications and build a strong project portfolio with mentorship and placement support.
Location: Bangalore (Hybrid/On-site)
Duration: 2–3 months
Eligibility: Final-year students and pre final year (ECE/EEE/CSE/Mechatronics)
#EmbeddedSystems #IoTInternship #EngineeringInternship #CoreTechCareers #Microcontrollers #RTOS #PCBDesign #IoTProjects #KnowxInnovations #AIoT #TechInternship #SkillDevelopment #HandsOnLearning #BangaloreInternship #StudentInternship
C++CC, C++ , Linux , Device Driver , Linux Internals ,
Processor knowledge like Arm , Intel , Protocol SPI , I2C . Networking experience,
L2 protocols knowledge, knowledge on Python/Perl ,
Broadcom DNX/XGS device experience is desirable,
Interested to learn New things,
C,C++, LINUX INTERNAL OR IPC, LINUX OS CONCEPTS, DEVICE DRIVERS,
PROCESSOR KNOWLEDGE
SCRIPTING KNOWLEDGE EIHER PYTHON OR PERL
C++Bachelors/Masters Degree in Engineering
Position : BSP Engineer
Total experience : 4+ yrs to 10 yrs
Desired Skills And Experience
4+ years of experience in application development, drivers development.
At least 4 years of working experience in the design and development of u-boot and Linux kernel subsystems and drivers.
Excellent programming skills in C/C++ and Hands-on experience in ARM-based SoC.
Experience in BSP and Boot loaders
Linux Device drivers Development and knowledge of RTOS.
Device drivers experience preferably for following devices: UART, I2C, I2S, SPI, GPIO, PCIe, MMC, USB etc.,
Hands-on experience on WIFI and SDIO has added advantage.
Strong debugging skills.
CC++
Go Programming (Golang)* Chip level verification, 𝗦𝗩/𝗨𝗩𝗠 Methodology
* 𝗘𝘁𝗵𝗲𝗿𝗻𝗲𝘁/𝗔𝗫𝗜/𝗣𝗖𝗜𝗘 protocols and seeded
* Exposure to any of these scripting language -perl/bash-shell/python
* Have lots of debugging skills to quickly scan and identify issues in system verilog/Verilog,C-code
* Good in tool usage for simulation (VCS),waveform debug(Verdi)
CC++Location:Bangalore / Chennai
Type: Permanent
Company Type: AI / Digital Product Design Service based
Job Description
* Experience in C/C++ and have strong experience embedded application development and integration in Linux
* Good in creating unit tests, performing code reviews, optimizing performance and ensuring standards for maintainability
* Debugging, profiling, and performance optimization skills
* Have experience working in a fast paced Agile/Scrum environment
INNOPHASE is a rapidly growing communications semiconductor startup with headquarters located in San Diego, CA. It is an exciting time to join InnoPhase and work with a brilliant team of engineers to design innovative wireless products and solutions for IoT/5G.
InnoPhase Bangalore is looking for a Senior Design Verification (DV) Engineer to join a growing start up semiconductor development organization and to help drive excellence in our IOT/5G products.
Responsibilities:
- Follow and help define the team's design verification methodology.
- Write bus functional models that drive and monitor stimulus.
- Plans and implements block and integration level scoreboards and checkers to verify functional behavior.
- Experience constructing chip-level System Verilog and UVM test bench environments, writing System Verilog Assertions (SVAs), with embedded software design and test.
- Develop RAL test plan at SOC/IP level and its implementation.
- Write and analyze functional coverage, providing input to block-level milestones.
- Triage regression failures and identify logic bugs, while driving bug closure.
- Debug test cases and report verification results to achieve the expected code/functional coverage goal. Utilize constrained random verification, functional coverage, code coverage and assertions to achieve goals.
Knowledge and Skills Required:
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science or equivalent.
- 5+ years of experience in VLSI design or verification
- Excellent collaboration, teamwork and communication skills
- Significant experience in reviewing and modifying IP block verification plans, a real plus if created such plans in collaboration with design engineering.
- Track record of completing IP block verification to acceptable coverage metrics.
- Excellent debugging skills, with experience debugging RTL in the block and/or chip-level environments.
- Working knowledge of OVM or UVM methodologies.
- Good analytical and problem-solving skills.
- Proficient knowledge of programming and scripting, hardware description language, electronic design automation (EDA), and/or FPGA tools.
CC++
CC++- Work directly with the other Software/Firmware Engineers and Electrical/RF/Systems Test Engineers to write needed software
- Design and implement software platform for firmware on embedded CPUs with multiple OS such as Windows, Linux, FreeRTOS, TI-RTOS and embedded Linux
- Use compliers, debuggers revision control and automated build systems.
- Design/develop components of software platform for use by other developers to extend its capabilities and build custom applications/behavior on top
- Develop build methodologies, debugging tools/utilities
- Develop and release Software using Agile methodology
- Write unit tests and support continuous integration and automated test methodology
- Brainstorm for new ideas and ways to improvement product and processes
- Consult with peers for feedback during debug/testing stages
- Document and maintain design processes
C++C
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