
About Espressif Systems India Pvt Ltd
About
Connect with the team
Similar jobs
Python Embedded Engineer
Location: Chennai
Experience : 3+ years
Budget : 1.2 LPM
We are looking for
Python Engineer who has experience in embedded system is must. Please look for the candidates who are trustworthy and good in communication.
We are looking for a skilled Python Embedded Engineer with 3+ years of experience and exposure to embedded systems.
The ideal candidate will work closely with cross-functional teams to design, develop, and optimize software solutions that interact with hardware and embedded platforms.
Key Responsibilities
Design, develop, and maintain robust Python-based applications and tools.
Work on embedded system software development and integration.
Collaborate with hardware, firmware, and system teams for end-to-end solution development.
Optimize software performance for embedded environments.
Debug, troubleshoot, and resolve system-level issues.
Participate in code reviews and ensure adherence to coding standards.
Contribute to testing, validation, and product release activities.
Required Skills & Qualifications
3+ years of professional experience in Python development.
Strong understanding of software development fundamentals.
Experience or exposure to embedded systems is preferred.
Knowledge of hardware-software interaction and communication protocols.
Familiarity with Git or other version control systems.
Good analytical and problem-solving skills.
Strong communication and teamwork abilities.
Good to Have
Experience with C/C++.
Knowledge of RTOS or Linux-based embedded systems.
Experience with microcontrollers, sensors, or device drivers.
Exposure to CI/CD and automated testing frameworks.
- Coding and Debugging in C language.
- Knowledge on ARM based architectures of 8/16/32 Microcontrollers,UART, ADC, DAC,Ethernet, SPI,CAN,I2C and I2S.
- FPGA RTL coding and Simulation using Verilog/VHDL
Qualification - BE/B.Tech (ECE), M.Sc.(Electronics)
Only Defense and Aerospace, Electronics, Semi-Conductors,
(No Automative industry)
AVANTEL LIMITED is a technology driven public limited company with focus on developing innovative wireless communication products and solutions to meet unique requirements of defense, railways, and telecom sectors. The organization is certified against AS 9100D and ISO 9001:2015 standards for Quality Management System. For more details visit www.avantel.in.
Are you a motivated and knowledgeable engineer ready to make a significant impact in the world of advanced technology? Designnex is on the lookout for a dynamic Design Verification Engineer to join our innovative team. In this exciting role, you will collaborate closely with customers to verify cutting-edge Interface IP (IIP) in their ASIC SoC/systems for groundbreaking next-generation products.
Key Responsibilities:
- Collaborate with customers to verify cutting-edge IPs in their ASIC SoC/systems.
- Provide support throughout the ASIC design cycle, focusing on design verification.
- Engage with the latest industry specifications and applications.
- Work with a diverse, worldwide team and interact with industry experts and leaders.
Key Qualifications:
- Experience: At least 2 years of related ASIC design verification experience. Strong academic backgrounds with relevant knowledge considered.
Skills:
- Experience in IP design verification flow of ASIC/SoC design (e.g., simulation, verification, RTL synthesis).
- Advanced lab experience (e.g., ATE, high-speed interface IP bring-up).
- Strong communication skills and ability to interact with peers from different geographies.
- Proficiency in UVM and SystemVerilog.
- Good to Know: PCIE and CXL specifications and design verification.
Preferred Experience:
- Technical knowledge of Interface IPs such as PCIe, Ethernet Protocols, Specification, Design, Verification, and Implementation.
- Proven track record in meeting tight schedules and handling multiple projects concurrently.
- Experience in various ASIC design cycles, including HIP/SIP integration into high-scale SoCs, design verification flows, physical implementation, SI/PI, and silicon bring-up in the lab.
Join Designnex and be part of a team at the forefront of technological advancements. Apply today and help shape the future of ASIC design and integration!
Summary:
Hyperspec is building a real time local map for self-driving cars and using cross view localization to enable ubiquitous autonomy. Hyperspec is a VC funded startup.
The principal embedded systems engineer will have deep expertise in embedded systems design, development and worked for years on embedded systems teams. This person is a leader and mentor to junior engineers and shares knowledge about the design and development of embedded systems.
Responsibilities:
- Serves as an expert in all aspects of embedded projects and embedded systems—including designing, developing, testing, and perfecting designs
- Responsible for updating and working with executive leadership on the development of embedded systems and status of projects
- Provides guidance and mentoring to other members of the team
Requirements:
- Minimum of bachelors' degree in computer science or engineering
- At least ten years of engineering experience with expertise in software engineering, data structures, and programming techniques
- Deep expertise in C/C++ programming
- Experience with FPGAs, PCB, Xilinx, Altera, or similar SoCs.
- Experience with ISPs, Cameras, Switches a plus.
- Experience in working with real-time operating systems, communications protocols and firmware design.
- Experience in interfaces, IP protocols, and hardware subsystems.
- Experience in working as part of a team and leading teams.
* Chip level verification, 𝗦𝗩/𝗨𝗩𝗠 Methodology
* 𝗘𝘁𝗵𝗲𝗿𝗻𝗲𝘁/𝗔𝗫𝗜/𝗣𝗖𝗜𝗘 protocols and seeded
* Exposure to any of these scripting language -perl/bash-shell/python
* Have lots of debugging skills to quickly scan and identify issues in system verilog/Verilog,C-code
* Good in tool usage for simulation (VCS),waveform debug(Verdi)
- Essential Skills and Experience
- Experience in designing and implementing verification environments for complex RTL designs
- Well-versed in the use of hardware verification languages e.g. SystemVerilog or Specman e
- Verification methodologies such as UVM
- Understanding of end-to-end verification processes, from test plan creation through to verification closure
- Ability to quickly understand and apply complex specification detail
- Understanding of the fundamentals of computer architecture, with an emphasis on pipelining, exception handling, memory systems
- Practical experience of working on microprocessor designs
- In-depth understanding of memory protection, memory translation, vector processing in CPUs, exception and interrupt handling.
- Understanding of constrained random stimulus, the goals and general usefulness of different types of coverage in hardware, as well as checking methodologies and behavioral functional models.
- Knowledge of assembly language (preferably Arm), and/or C/C++
- In-depth technical reviewing of others work







