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Senior Design Verification Engineer
Senior Design Verification Engineer
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Senior Design Verification Engineer

Cheryl Lavya's profile picture
Posted by Cheryl Lavya
5 - 15 yrs
₹20L - ₹40L / yr
Bengaluru (Bangalore)
Skills
Electronic engineering
Electrical engineering
UVM
SVA
SOC/IP
Very Large Scale Integration (VLSI)
EDA

INNOPHASE is a rapidly growing communications semiconductor startup with headquarters located in San Diego, CA. It is an exciting time to join InnoPhase and work with a brilliant team of engineers to design innovative wireless products and solutions for IoT/5G.

 

InnoPhase Bangalore is looking for a Senior Design Verification (DV) Engineer to join a growing start up semiconductor development organization and to help drive excellence in our IOT/5G products.

 

Responsibilities:

 

  • Follow and help define the team's design verification methodology.
  • Write bus functional models that drive and monitor stimulus.
  • Plans and implements block and integration level scoreboards and checkers to verify functional behavior.
  • Experience constructing chip-level System Verilog and UVM test bench environments, writing System Verilog Assertions (SVAs), with embedded software design and test.
  • Develop RAL test plan at SOC/IP level and its implementation.
  • Write and analyze functional coverage, providing input to block-level milestones.
  • Triage regression failures and identify logic bugs, while driving bug closure.
  • Debug test cases and report verification results to achieve the expected code/functional coverage goal. Utilize constrained random verification, functional coverage, code coverage and assertions to achieve goals.

 

Knowledge and Skills Required:

 

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science or equivalent.
  • 5+ years of experience in VLSI design or verification
  • Excellent collaboration, teamwork and communication skills
  • Significant experience in reviewing and modifying IP block verification plans, a real plus if created such plans in collaboration with design engineering.
  • Track record of completing IP block verification to acceptable coverage metrics.
  • Excellent debugging skills, with experience debugging RTL in the block and/or chip-level environments.
  • Working knowledge of OVM or UVM methodologies.
  • Good analytical and problem-solving skills.
  • Proficient knowledge of programming and scripting, hardware description language, electronic design automation (EDA), and/or FPGA tools.
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About Innophase

Founded :
2020
Type :
Product
Size :
20-100
Stage :
Profitable
About

InnoPhase is a fabless wireless semiconductor platform company specializing in extreme low power wireless radio solutions. It invented the groundbreaking PolaRFusionTM digital radio architecture, a patented semiconductor that dramatically increases battery lifetime 50%+ in typical applications.


Headquarters is located in San Diego, CA with an additional advanced design centers located in Kista Sweden, and Bangalore, India.

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Subodh Popalwar

Software Engineer, Memorres
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