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Verilog
SystemVerilog
VMM
UVM
+3 more
Digital Verification Engineer
About Company:
Espressif Systems is a multinational, fabless semiconductor company established in 2008, with headquarters in Shanghai and offices in Greater China, India and Europe. We have a passionate team of engineers and scientists from all over the world, focused on developing cutting-edge WiFi-and-Bluetooth, low-power, IoT solutions. Among our popular products are the ESP8266 and ESP32 series of chips, modules and development boards.
Job Description
1. Develop verification programs and define the verification environment according to design documentation, in order to conduct module- to chip-level verification;
2. Perform regression tests to improve verification coverage;
3. Assist the FPGA and software teams in FPGA prototype testing;
4. Collaborate with chip design engineers to find and fix any design defects;
5. Ensure the integrity of chip designs by supervising the design department when building verifiable design processes;
6. Carry out door-level simulation, with UPF verification methodology, to ensure successful chip tapeout.
Job Prerequisites
1. Bachelor’s degree, or above, in Computer Engineering/Electronic Engineering/Communications Engineering, or other related disciplines;
2. 5+ years of work experience;
3. Familiarity with SoC and communication theory;
4. Familiarity with Verilog, proficiency in C/System Verilog verification;
5. Proficiency in Perl/Shell/Tcl scripts;
6. Experience in FPGA verification and/or chip tapeout is a plus;
7. Familiarity with VMM/UVM is a plus.
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