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Responsibilities
• End-to-End Embedded/DSP system design.
• Complex logic implementation using RTL coding techniques (preferably VHDL and HLS)
• Able to implement various complex algorithms and curve fitting/Neural network based algorithms inside the FPGA hardware.
• Writing modular RTL codes and design techniques using IPs.
• Simulating the design at various stages of development.
• CDC, STA, area/power optimizations, floor planning, linting.
• Interfacing high speed ADCs/DACs using state of the art data transfer links to FPGA.
• Using DDR RAM and SG-DMA for low latency, high-speed data transfer.
• Familiarity with high-speed communication systems viz. USB 3, PCIe, Gbe, 10 Gbe, 100
Gbe etc.
• Linux device driver development.
Skills
• VHDL/Verilog, C/C++, familiar with Xilinx development tools.
• Design knowledge of PCIe, LVDS, SPI, AXI, USB etc. interfaces.
• Ability to design using primitives instead of inferred design from RTL.
• Embedded linux device drivers, petalinux, exposure to yocto project.
• Exposure to various compression algorithms.
Desired Qualification/Experience
• Talent and zeal to work with new challenging system designs.
• Thorough understanding of digital systems.
• Hands-on experience on the RTL design, preferably with a repository of previous
projects
Responsibilities
- Responsible for design and spec development and design of analog blocks for advanced mixed-signal / analog circuits.
- Write detailed design specification and will be in close collaboration with the system architect, circuit designers and design verification engineers.
- Work on behavioral modeling of analog blocks and support design verification to ensure bug free silicon.
- Lead development of analog blocks in collaboration with external vendors and lead integration, test plan and characterization efforts.
Requirements
- Strong track record of architect, develop, verification and validation of complete silicon IPs
- Deep understanding of bandgaps, bias, opamps, switched-cap circuits, LDOs, PLLs, feedback and compensation techniques, DCDC converters
- In-depth knowledge and good understanding of analog design techniques.
- Experience in digital integration of analog IPs with chip level integration team
- Experience in developing behavior modeling a plus
- Experience IP design management or vendor management a plus
- Strong device physics knowledge as it applies to analog IC design
- Hand-on experience with IP lab characterization using spectrum analyzers, oscilloscopes, signal generators, etc.
- Experience in working with production test engineers to produce test plans and design for testability details
- Excellent communication skills
- Team player with an ability to encourage team members
Education & Experience
- MS (preferred in EE) plus 8 years
- PhD (preferred in EE) plus 5 years
Note:
Annual job salary: The annual job salary mentioned in this posting is a default number taken by cutshort and is inaccurate. <Not mentioned/ disclosed by Rivos>
Resumes:
Interested folks with 3+ years to 20 years of experience into AMS Design, Please reach out to the Recruiter Deepa Savant to learn more about the job and discuss details.
alog Circuit Design::
- The candidate should have B.Tech or M.Tech in Electronics/Electrical/VLSI Design Engineering
- The candidate should have relevant work experience of 7-16 years in Analog and SERDES IO IP design e.g. GPIOs, Thermal Sensor, PLL, ADC/DAC/ Voltage regulators/LDOs, AIB, HBMIO, DDR, HDMI/DP IO, MIPI IO etc.
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