Responsibilities
- Responsible for design and spec development and design of analog blocks for advanced mixed-signal / analog circuits.
- Write detailed design specification and will be in close collaboration with the system architect, circuit designers and design verification engineers.
- Work on behavioral modeling of analog blocks and support design verification to ensure bug free silicon.
- Lead development of analog blocks in collaboration with external vendors and lead integration, test plan and characterization efforts.
Requirements
- Strong track record of architect, develop, verification and validation of complete silicon IPs
- Deep understanding of bandgaps, bias, opamps, switched-cap circuits, LDOs, PLLs, feedback and compensation techniques, DCDC converters
- In-depth knowledge and good understanding of analog design techniques.
- Experience in digital integration of analog IPs with chip level integration team
- Experience in developing behavior modeling a plus
- Experience IP design management or vendor management a plus
- Strong device physics knowledge as it applies to analog IC design
- Hand-on experience with IP lab characterization using spectrum analyzers, oscilloscopes, signal generators, etc.
- Experience in working with production test engineers to produce test plans and design for testability details
- Excellent communication skills
- Team player with an ability to encourage team members
Education & Experience
- MS (preferred in EE) plus 8 years
- PhD (preferred in EE) plus 5 years
Note:
Annual job salary: The annual job salary mentioned in this posting is a default number taken by cutshort and is inaccurate. <Not mentioned/ disclosed by Rivos>
Resumes:
Interested folks with 3+ years to 20 years of experience into AMS Design, Please reach out to the Recruiter Deepa Savant to learn more about the job and discuss details.
Subodh Popalwar
Software Engineer, Memorres
About Rivos Inc
Similar jobs
Responsibilities
- Provide leadership in building and growing a Custom layout team from the ground up to support the global DRAM layout requirement;
- Provide leadership in developing Analog and custom layouts to meet schedules and milestones;
- Provide leadership in training the team’s technical skills and cultural healthiness.
- Effectively communicating with engineering teams across multiple countries to ensure the success of the layout project.
- Organize, prioritize, and manage logistics on tasks and resource allocations for multiple projects.
- Manage the performance and development of team members.
- Managing hiring and retention.
- As a critical member of the core DRAM leadership team in India, contributed to the overall success
Qualification/Requirements
- 5 + year experience in analog/custom layout in advanced CMOS process.
- Minimum 3+ years people management experience.
- Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must.
- Must have strong skills in layout and floor planning skills and manual routing.
- Strong ability to build, and continuously develop a premier analog/mixed-signal layout team
- Experienced in managing multiple Custom IC layout projects
- Highly motivated with passion, detail-oriented, systematic, and methodical approach in IC layout design.
- The ability to work and communicate effectively in a team and to be able to multi-task effectively in a fast-paced working environment.
- Excellent verbal and written communication skills required.
- Independent with strong analytical skills, creative thinking and self-motivation.
- Capable of working in a cross-functional, multi-site team environment in multiple time zones.
- Previous work experience in DRAM/NAND layout design is desirable however not mandatory.
Company Overview:
Replicant Systems is a dynamic startup focused on developing capabilities in hardware design solutions. We are dedicated to creating innovative products that push the boundaries of technology and enhance user experiences for clients in consumer electronics, power and aerospace & defence industries.
Replicant Systems is founded by experienced entrepreneurs-turned-angel investors who operate their own family office for investments in Hyderabad, called Sunn91 Ventures.
Position Summary:
We are seeking a passionate and motivated Hardware Design Intern to join our team. This internship offers a unique opportunity to see the inner workings of a startup from the ground-up and gain hands-on experience in hardware design and business development.
Location: Hyderabad, on-site
Key Responsibilities:
- Contribute to market research, product ideation, prototyping, and testing
- Participate in brainstorming sessions and contribute innovative ideas to enhance product designs.
- Attend client meetings and gain invaluable insight interacting with CXO suite executives and upper management
- Assist in the design and development of hardware components and systems.
- Assist in the creation and review of schematics, PCB layouts, and technical documentation
- Support in the selection and evaluation of components and materials for hardware projects
Qualifications:
- Currently pursuing a degree in electronics and communications engineering (ECE), mechanical engineering or related field
- Strong understanding of basic electronics principles and circuit design fundamentals
- Proficiency in CAD tools such as AutoCad, Altium Designer, Eagle, or KiCad is preferred
- Familiarity with microcontroller programming and embedded systems is a plus
- Excellent problem-solving skills and attention to detail.
- Ability to work effectively in a team environment and adapt to changing project requirements.
- Excellent communication skills and ability to articulate ideas clearly.
Benefits:
- Gain valuable hands-on experience in hardware design within a startup environment
- Work closely with the founders who are dedicated to your professional growth
- Opportunity to contribute to real-world projects and see your ideas come to life
Duration:
This is a 3-month internship position with the potential for extension based on performance and mutual agreement.
Responsibilities
- Responsible for performing verification for AMS designs.
- Create UVM benches for mixed signal blocks and developing test scenarios.
- Work closely with the architecture and design teams on verification plan and methodology to achieve complete verification coverage
- Write assertions and checkers for the properties and corner cases
- Analyze verification coverage and improve the test cases
- Integrate analogue design IPs from vendors and internal teams and develop verification environments for simulation and emulation
Requirements
- Detailed knowledge of verification using SystemVerilog
- Experience with creating UVM based testbenches for Analog Mixed-Signal applications
- Experience with assertion based verification for analog blocks
- Experience with power aware verification with UPF will be a plus
- UVM-AMS experience preferred
- Experience with sv-real preferred
- Scripting skills in perl / python is preferred
- Excellent communication skills
- Team player with an ability to encourage team members
Education & Experience
- MS (preferred in EE and CE) plus 5 years
Note:
Annual job salary: The annual job salary mentioned in this posting is a default number taken by cutshort and is inaccurate. <Not mentioned/ disclosed by Rivos>
Resumes:
Interested folks with 5+ years to 20 years of experience into AMS Verification, Please reach out to the Recruiter Deepa Savant to learn more about the job and discuss details.
Key qualifications•
The ideal candidate will have 4+ years of experience in backend design automation and standard cell characterization
• Prior experience and proven success of successfully designing high performance standard cells is desired
• Solid knowledge of circuit analysis, reliability, extraction, and SPICE simulation to validate design performance
• Knowledge of industry standard hardware design CAD software and required standard cell design view generation and validation.
• Solid foundation of scripting fluency in TCL, Perl/Python
• Basic knowledge of advanced FinFet device and standard cell circuit and layout
• Ability to work well in a team and be productive under aggressive schedules.
• Excellent problem solving, written and verbal communicationResponsibilities• Responsible for timing and power characterization and generation of standard cell EDA views,
• Other job duties include performing QA including EM/IR and design checks
• adding automation to improve design productivity
Note:
Annual job salary: The annual job salary mentioned in this posting is a default number taken by cutshort and is inaccurate. <Not mentioned/ disclosed by Rivos>
Resumes:
Interested folks with 4+ years of experience in Standard cell, Please reach out to the Recruiter Deepa Savant to learn more about the job and discuss details.
Custom Memory Design
SRAM/custom circuit design and standard cell design
|
Qualifications • Candidates must have 7+ years of experience in transistor level custom circuit design from RTL-GDS for CPU and SoC, circuit simulation, equivalence checking, PPA trade off analysis, low power design techniques, timing, noise and power characterization • Prior experience and proven success of successfully designing high performance SRAM memories, Register file memories, SRAM compilers, data path designs and standard cells • Experience designing transistor-level custom circuits in advanced FinFET technology nodes • Solid understanding of device physics, process technology and circuit design techniques for high performance, low power • Experience with advanced process design rules and supervising mask design • Knowledge developing automation for compilers and standard cells • Post-Silicon test and debug experience • Ability to work well in a team and be productive under aggressive schedules • Excellent problem solving, written and verbal communication • Master's Degree or Bachelor's Degree with 7+ years of experience |
Responsibilities • The role will be at the center of a state-of-the-art circuit design effort, interfacing with all disciplines and have a critical impact on getting products to market quickly • Responsible for designing and delivering custom circuits from scratch • Drive design and development of SRAM, register file, custom cells to enable high performance and low power designs • Work with microarchitecture team to gather specifications • Drive optimal implementation Conduct early sizing estimates and PPA analysis • Perform design entry and simulations for optimal design sizing • Work closely with mask designers on custom design implementation, DFM and yield enhancement features • Collaborate with the CPU and SoC Physical design teams on floorplanning, placement, timing and power closure of the custom design • Interact with technology team • Participate in developing design and test plans Collaborate with the CAD team and drive design flow enhancements |
Job description
Rivos Custom Circuits team is seeking highly motivated candidates to develop state of the art custom SRAM memories, Register file memories, memory compilers and standard cells to improve circuit performance, optimize dynamic and static power and support silicon bring up. The role will be at the center of a state-of-the-art circuit design effort, interfacing with all disciplines and have a critical impact on getting products to market quickly.
Responsibilities
- Responsible for designing and delivering custom circuits from scratch.
- Drive design and development of SRAM, register file, custom cells to enable high performance and low power designsWork with microarchitecture team to gather specifications
- Drive optimal implementation Conduct early sizing estimates and PPA analysis. Perform design entry and simulations for optimal design sizingWork closely with mask designers on custom design implementation, DFM and yield enhancement featuresCollaborate with the CPU and SoC Physical design teams on floorplanning, placement, timing and power closure of the custom designInteract with technology team
- Participate in developing design and test plans Collaborate with the CAD team and drive design flow enhancements
Qualification
- Candidates must have 7+ years of experience in transistor level custom circuit design from RTL-GDS for CPU and SoC, circuit simulation, equivalence checking, PPA trade off analysis, low power design techniques, timing, noise and power characterization.
- Prior experience and proven success of successfully designing high performance SRAM memories, Register file memories, SRAM compilers, data path designs and standard cells
- Experience designing transistor-level custom circuits in advanced FinFET technology nodes
- Solid understanding of device physics, process technology and circuit design techniques for high performance, low power
- Experience with advanced process design rules and supervising mask design
- Knowledge developing automation for compilers and standard cells
- Post-Silicon test and debug experience
- Ability to work well in a team and be productive under aggressive schedules.
- Excellent problem solving, written and verbal communication
Education and Experience
- Master's Degree or Bachelor's Degree with 7+ years of experience
• Support in Upfront Technical Architecture and high level design to ensure
that the product meets manufacturability, Serviceability, performance,
reliability, cost, feature set ETC.
• Work with the team of design engineers for designing of analog and digital
circuits which meets functional, reliability, manufacturability, testing and
ergonomic requirements.
• Expected to maintain and improve systems and development processes.
• Manage the projects and ensure timely delivery
alog Circuit Design::
- The candidate should have B.Tech or M.Tech in Electronics/Electrical/VLSI Design Engineering
- The candidate should have relevant work experience of 7-16 years in Analog and SERDES IO IP design e.g. GPIOs, Thermal Sensor, PLL, ADC/DAC/ Voltage regulators/LDOs, AIB, HBMIO, DDR, HDMI/DP IO, MIPI IO etc.
RESPONSIBILITIES:
- You will support the product delivery roadmap of our BIM Software with a focus on our installations feature; our highly automated MEP (Mechanical, Electrical & Plumbing) design module, through the analysis and the testing of the new features, by monitoring the regressions, by finding the lack in the requirements (corner cases), by providing usability feedback, and how it deals with the other modules (Structural, Architectural, FEM).
- With the other QA members, you will be the link between the UX/UI Design team, the Product Owner, the Software Development teams in order to ensure the quality to deliver the whole BIM software and all its components.
- Analyze and Understand the Feature Requirements as well as find lacks (corner cases).
- Test features iteratively.
- Provide Usability Feedback as Technical user/ Standard User.
- Assess the Bugs severity.
- Monitor Feature Regressions.
- Helps to define the NFR.
- Works with Agile cross-functional teams with various stakeholders like UX Designers, Product Owners, Developers, and Scrum Master.
BASIC QUALIFICATIONS:
- 2+ years of experience in the design of Civil Electrical Installations (e.g. Wiring Systems and Methods of Electrical Wiring).
- Bachelor’s Degree in Electrical Engineering.
- Practical and demonstrable experience with Electrical Circuit Design Simulator (e.g. Multisim/ SPICE/ ETAP).
- Friendly with Electrical Visual Design Software (e.g. Revit).
- Friendly with different OS Environments (Windows/ MaCOSx/ Linux).
- Relevant IT Certifications.
NICE TO HAVE:
- Experiences with Agile Methodologies (Scrum, Kanban).
- Basic Knowledge of Quality Assurance theory: principles, methodologies, and techniques.
- Knowledge of at least one Collaborative Revision System (e.g. Bitbucket, Gitlab).
Relevant Soft Skills for this role:
- Open learning things he/she has never seen before;
- Passion for technology;
- Proactive, self-starter skills and ability to manage multiple tasks effectively;
- Excellent communication skills with the ability to engage, influence, and inspire partners and stakeholders to drive collaboration and alignment;
- A high degree of organization, individual initiative, and personal accountability
- Outstanding written and verbal communication; must be a clear, concise, persuasive communicator.
Skills/Experience
Experience with complete flows involving timing closure of high speed digital design using scripting languages and design automation.
Has deep knowledge of Xilinx FPGA implementation and tools.
Experience in state of the art tools and flows.
Working knowledge in Verilog and System Verilog.
Job Requirements
Bachelors in Electronics Engineering.
Strong knowledge of ASIC and/or FPGA design methodology and should be well versed in front-end design, simulation, and verification CAD tools.
Relevant FPGA/ASIC engineering design and verification experience is entertained.
Excellent verbal, written and communication skills are required.
Excellent follow-through, motivation, and persistence
Strong technical judgment and decision making abilities.
Knowledge of digital board design and signal integrity principles is a plus.
Follow CutshortSubodh Popalwar
Software Engineer, Memorres