2+ System on a chip Jobs in Bangalore (Bengaluru) | System on a chip Job openings in Bangalore (Bengaluru)

 

Positions are open for full-time in the areas of DFT design from unit level to chip level, involving all aspects of DFT design functions from scan, MBIST, to ATPG. Roles in the areas of CPU and SOC DFT design and verification.

• Define DFT strategy and methodologies
• Design the DFT features
• Define test structures, debug structures, and test plans
• Create test vectors or oversee their creation
• Collaborate with physical design team to close requirements
• Validate DFT requirements are being met
• Work with designers to increase test coverage, debug observability and flexibility
• Verify post-PD designs meet DFT requirements
• Work with verification engineers, stepping in to do run tests when needed

• Good knowledge of digital logic design, microprocessor, debug feature, DFT architecture, CPU architecture, and microarchitecture
• Knowledge of DFT and structural debug concepts and methodologies: JTAG, IEEE1500, MBIST, scan dump, memory dump
• Knowledge of Verilog and experience with simulators and waveform debugging tools
• Knowledge of Verilog / SystemVerilog
• Knowledge of Python, , Shell scripting, Makefiles, TCL a plus
• Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated.
• Ability to work well in a team and be productive under aggressive schedules.

PhD, Master’s Degree or Bachelor’s Degree in technical subject area.


Note:
Annual job salary: The annual job salary mentioned in this posting is a default number taken by cutshort and is inaccurate. <Not mentioned/ disclosed by Rivos>

Resumes:
Interested folks with 3+ years of experience to 20 years of experience into Silicon DFT,  Please reach out to the Recruiter Deepa Savant to learn more about the job and discuss details. 

 

Positions are open for full-time and Co-op/internship in the areas of CPU and SOC verification from unit level to chip level as well as all aspects of verification such as functional, microarchitecture, performance, and formal.

We are looking for all levels of talent, from entrance to advanced level of experience.

• Work closely with architecture and RTL designers on verifying the functionality correctness of the design
• Reviewing Architecture and Design Specifications
• Develop test plans and test environments
• Develop tests in assembly, C/C++, or vectors according to test plans
• Develop coverage monitors and analyze coverage to ensure all the test cases in the plans are covered
• Develop checkers in SystemVerilog or C-base transactors to verify the design
• Write assertions and apply formal verification to the designImplementing test benches, generating directed/constrained random tests
• Debugging failures, running simulations, tracking bugs
• Handling schedules and supporting multi-functional engineering effortAssisting in verification flows, automation scripts and regressions

• In-depth knowledge of digital logic design, CPU/SOC architecture and microarchitecture.
• Sophisticated knowledge of SystemVerilog.
• Experienced level knowledge C/C++.Relevant knowledge of verification methodologies and tools such as simulators, waveform viewers, build and run automation, coverage collection.
• Basic knowledge of formal verification methodology is a plus.
• Excellent knowledge of one of the scripting languages such as Python, TCL is a plus.
• Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated.
• Ability to work well in a team and be productive under aggressive schedules.

• PhD, Master’s Degree or Bachelor’s Degree in technical subject area.

Note:
Annual job salary: The annual job salary mentioned in this posting is a default number taken by cutshort and is inaccurate. <Not mentioned/ disclosed by Rivos>

Resumes:
Interested folks with 2+ years  to 20 years of experience into Silicon CPU or SOC Verification, Please reach out to the Recruiter Deepa Savant to learn more about the job and discuss details.