3 System on a chip Jobs in Bangalore (Bengaluru) | System on a chip Job openings in Bangalore (Bengaluru)
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Hyderabad, Bengaluru (Bangalore) · 10 - 12 years · ₹30L - ₹35L / yr · Posted 28 Dec 2025
PythonPerl
EDA
Test Automation (QA)
Supply Chain Management (SCM)
+90 more
MANDATORY CRITERIA:
- Education: B.Tech / M.Tech in ECE / CSE / IT
- Experience: 10–12 years in hardware board design, system hardware engineering, and full product deployment cycles
- Proven expertise in digital, analog, and power electronic circuit analysis & design
- Strong hands-on experience designing boards with SoCs, FPGAs, CPLDs, and MPSoC architectures
- Deep understanding of signal integrity, EMI/EMC, and high-speed design considerations
- Must have successfully completed at least two hardware product development cycles from high-level design to final deployment
- Ability to independently handle schematic design, design analysis (DC drop, SI), and cross-team design reviews
- Experience in sourcing & procurement of electronic components, PCBs, and mechanical parts for embedded/IoT/industrial hardware
- Strong experience in board bring-up, debugging, issue investigation, and cross-functional triage with firmware/software teams
- Expertise in hardware validation, test planning, test execution, equipment selection, debugging, and report preparation
- Proficiency in Cadence Allegro or Altium EDA tools (mandatory)
- Experience coordinating with layout, mechanical, SI, EMC, manufacturing, and supply chain teams
- Strong understanding of manufacturing services, production pricing models, supply chain, and logistics for electronics/electromechanical components
DESCRIPTION:
COMPANY OVERVIEW:
The company is a semiconductor and embedded system design company with a focus on Embedded, Turnkey ASICs, Mixed Signal IP, Semiconductor & Product Engineering and IoT solutions catering to Aerospace & Defence, Consumer Electronics, Automotive, Medical and Networking & Telecommunications.
REQUIRED SKILLS:
- Extensive experience in hardware board designs and towards multiple product field deployment cycles.
- Strong foundation and expertise in analyzing digital, Analog and power electronic circuits.
- Proficient with SoC, FPGAs, CPLD and MPSOC architecture-based board designs.
- Knowledgeable in signal integrity, EMI/EMC concepts for digital and power electronics.
- Completed at least two project from high-level design to final product level deployment.
- Capable of independently managing product’s schematic, design analysis DC Drop, Signal Integrity, and coordinating reviews with peer of layout, mechanical, SI, and EMC teams.
- Sourcing and procurement of electronic components, PCBs, and mechanical parts for cutting-edge IoT, embedded, and industrial product development.
- Experienced in board bring-up, issue investigation, and triage in collaboration with firmware and software teams.
- Skilled in preparing hardware design documentation, validation test planning, identifying necessary test equipment, test development, execution, debugging, and report preparation.
- Effective communication and interpersonal skills for collaborative work with cross-functional teams, including post-silicon bench validation, BIOS, and driver development/QA.
- Hands-on experience with Cadence Allegro/Altium EDA tools is essential.
- Familiarity with programming and scripting languages like Python and Perl, and experience in test automation is advantageous.
- Should have excellent exposure with coordination of Manufacturing Services, pricing model for production value supply chain & Logistics in electronics and electromechanical components domain.
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Bengaluru (Bangalore) · 4 - 18 years · ₹3L - ₹15L / yr · Raised funding · Posted 19 Nov 2022
DFT
System on a chip
PythonCPU
(INDIA) BANGALORE, INDIA /
ENGINEERING – SILICON ENGINEERING /
FULL-TIME
Positions are open for full-time in the areas of DFT design from unit level to chip level, involving all aspects of DFT design functions from scan, MBIST, to ATPG. Roles in the areas of CPU and SOC DFT design and verification.
Responsibilities
- Define DFT strategy and methodologies
- Design the DFT features
- Define test structures, debug structures, and test plans
- Create test vectors or oversee their creation
- Collaborate with physical design team to close requirements
- Validate DFT requirements are being met
- Work with designers to increase test coverage, debug observability and flexibility
- Verify post-PD designs meet DFT requirements
- Work with verification engineers, stepping in to do run tests when needed
Requirements
- Good knowledge of digital logic design, microprocessor, debug feature, DFT architecture, CPU architecture, and microarchitecture
- Knowledge of DFT and structural debug concepts and methodologies: JTAG, IEEE1500, MBIST, scan dump, memory dump
- Knowledge of Verilog and experience with simulators and waveform debugging tools
- Knowledge of Verilog / SystemVerilog
- Knowledge of Python, , Shell scripting, Makefiles, TCL a plus
- Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated.
- Ability to work well in a team and be productive under aggressive schedules.
Education and Experience
PhD, Master’s Degree or Bachelor’s Degree in technical subject area.
Note:
Annual job salary: The annual job salary mentioned in this posting is a default number taken by cutshort and is inaccurate. <Not mentioned/ disclosed by Rivos>
Resumes:
Interested folks with 3+ years of experience to 20 years of experience into Silicon DFT, Please reach out to the Recruiter Deepa Savant to learn more about the job and discuss details.
Note:
Annual job salary: The annual job salary mentioned in this posting is a default number taken by cutshort and is inaccurate. <Not mentioned/ disclosed by Rivos>
Resumes:
Interested folks with 3+ years of experience to 20 years of experience into Silicon DFT, Please reach out to the Recruiter Deepa Savant to learn more about the job and discuss details.
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Bengaluru (Bangalore) · 2 - 20 years · ₹1L - ₹15L / yr · Raised funding · Posted 18 Nov 2022
System on a chip
CPU
SOC
(INDIA) BANGALORE, INDIA /
ENGINEERING – SILICON ENGINEERING /
FULL-TIME
Positions are open for full-time and Co-op/internship in the areas of CPU and SOC verification from unit level to chip level as well as all aspects of verification such as functional, microarchitecture, performance, and formal.
We are looking for all levels of talent, from entrance to advanced level of experience.
Responsibilities
- Work closely with architecture and RTL designers on verifying the functionality correctness of the design
- Reviewing Architecture and Design Specifications
- Develop test plans and test environments
- Develop tests in assembly, C/C++, or vectors according to test plans
- Develop coverage monitors and analyze coverage to ensure all the test cases in the plans are covered
- Develop checkers in SystemVerilog or C-base transactors to verify the design
- Write assertions and apply formal verification to the designImplementing test benches, generating directed/constrained random tests
- Debugging failures, running simulations, tracking bugs
- Handling schedules and supporting multi-functional engineering effortAssisting in verification flows, automation scripts and regressions
Requirements
- In-depth knowledge of digital logic design, CPU/SOC architecture and microarchitecture.
- Sophisticated knowledge of SystemVerilog.
- Experienced level knowledge C/C++.Relevant knowledge of verification methodologies and tools such as simulators, waveform viewers, build and run automation, coverage collection.
- Basic knowledge of formal verification methodology is a plus.
- Excellent knowledge of one of the scripting languages such as Python, TCL is a plus.
- Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated.
- Ability to work well in a team and be productive under aggressive schedules.
Education and Experience
- PhD, Master’s Degree or Bachelor’s Degree in technical subject area.
Note:
Annual job salary: The annual job salary mentioned in this posting is a default number taken by cutshort and is inaccurate. <Not mentioned/ disclosed by Rivos>
Resumes:
Interested folks with 2+ years to 20 years of experience into Silicon CPU or SOC Verification, Please reach out to the Recruiter Deepa Savant to learn more about the job and discuss details.
Read more
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