Silicon DFT - Full time
at Rivos Inc
Silicon DFT - Full time at Rivos Inc · Bengaluru (Bangalore) · 4 - 18 years · ₹3L - ₹15L / yr (ESOP available) · Raised funding · Posted 20 Dec 2022

4 - 18 yrs
₹3L - ₹15L / yr (ESOP available)
Bengaluru (Bangalore)
Skills
DFT
System on a chip
CPU
(INDIA) BANGALORE, INDIA /
ENGINEERING – SILICON ENGINEERING /
FULL-TIME
Positions are open for full-time in the areas of DFT design from unit level to chip level, involving all aspects of DFT design functions from scan, MBIST, to ATPG. Roles in the areas of CPU and SOC DFT design and verification.
Responsibilities
- Define DFT strategy and methodologies
- Design the DFT features
- Define test structures, debug structures, and test plans
- Create test vectors or oversee their creation
- Collaborate with physical design team to close requirements
- Validate DFT requirements are being met
- Work with designers to increase test coverage, debug observability and flexibility
- Verify post-PD designs meet DFT requirements
- Work with verification engineers, stepping in to do run tests when needed
Requirements
- Good knowledge of digital logic design, microprocessor, debug feature, DFT architecture, CPU architecture, and microarchitecture
- Knowledge of DFT and structural debug concepts and methodologies: JTAG, IEEE1500, MBIST, scan dump, memory dump
- Knowledge of Verilog and experience with simulators and waveform debugging tools
- Knowledge of Verilog / SystemVerilog
- Knowledge of Python, , Shell scripting, Makefiles, TCL a plus
- Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated.
- Ability to work well in a team and be productive under aggressive schedules.
Education and Experience
PhD, Master’s Degree or Bachelor’s Degree in technical subject area.
Note:
Annual job salary: The annual job salary mentioned in this posting is a default number taken by cutshort and is inaccurate. <Not mentioned/ disclosed by Rivos>
Resumes:
Interested folks with 3+ years of experience to 20 years of experience into Silicon DFT, Please reach out to the Recruiter Deepa Savant to learn more about the job and discuss details.
Note:
Annual job salary: The annual job salary mentioned in this posting is a default number taken by cutshort and is inaccurate. <Not mentioned/ disclosed by Rivos>
Resumes:
Interested folks with 3+ years of experience to 20 years of experience into Silicon DFT, Please reach out to the Recruiter Deepa Savant to learn more about the job and discuss details.
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About Rivos Inc
Founded :
2021
Type :
Product
Size :
100-500
Stage :
Raised funding
About
A Startup in Stealth Mode!
Read more
Company social profiles
N/A
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Hello Everyone
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Good exposure to Synth, ATPG tools (Mentor) : DRC & coverage analysis, Timing/no timing (VCS) simulations.
Anyone already worked for Qcomm/product company is preferable.
Candidate should be independent in handling the given task.
Mandatory Skills:
ATPG trace (DRC), Stuck at and TDF Coverage Analysis
ATPG no timing and timing vector simulations
Apply now!!
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