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Job Title : Hardware Design Developer – Verilog
Employment Type : Full-Time Contract (8 hours/day)
Location : Remote
Experience : 3+ Years (Mandatory)
Notice Period : Immediate
Job Overview :
We are looking for an experienced Hardware Design Developer to leverage hardware design platforms for generating training data to enhance enterprise LLMs' capabilities. This role offers a unique opportunity to directly impact AI advancements by optimizing hardware designs for training and benchmarking large language models.
Key Responsibilities :
- Develop, configure, and customize hardware design platforms to generate training data for enterprise LLMs.
- Work closely with research teams to translate requirements into actionable insights.
- Ensure high-quality coding, debugging, and documentation to optimize hardware design solutions.
- Collaborate with cross-functional teams to improve LLM performance and automation capabilities.
Required Skills & Experience:
- BS/MS in Electrical Engineering or related field.
- 3 to 5 Years of hardware design development experience.
- Expertise in HDLs (Verilog, SystemVerilog, VHDL, SystemC).
- Strong background in scripting, front-end workflows, and verification processes.
- Familiarity with Synopsys, Cadence, or open-source toolchains.
- Excellent problem-solving and collaboration skills.
Preferred Qualifications :
- Expertise in UVM environments, Formal Verification, and Lint refinement.
- Experience with Computer Architecture, Assembly Debugging, and Assertion Coding (SVA).
- Familiarity with Machine Learning and AI systems.
Mandatory Technical Skills :
- Min 2 Years of relevant experience in Hardware Design and/or Verification.
- Experience with at least one of the following:
- ASIC, VLSI, FPGA, SoC development.
- SystemVerilog, Verilog, Testbench development, and Verification.
- Strong understanding of IP Development and Verification.
Note: This role focuses on LLM training using hardware design, not traditional project development.
Responsibilities
• End-to-End Embedded/DSP system design.
• Complex logic implementation using RTL coding techniques (preferably VHDL and HLS)
• Able to implement various complex algorithms and curve fitting/Neural network based algorithms inside the FPGA hardware.
• Writing modular RTL codes and design techniques using IPs.
• Simulating the design at various stages of development.
• CDC, STA, area/power optimizations, floor planning, linting.
• Interfacing high speed ADCs/DACs using state of the art data transfer links to FPGA.
• Using DDR RAM and SG-DMA for low latency, high-speed data transfer.
• Familiarity with high-speed communication systems viz. USB 3, PCIe, Gbe, 10 Gbe, 100
Gbe etc.
• Linux device driver development.
Skills
• VHDL/Verilog, C/C++, familiar with Xilinx development tools.
• Design knowledge of PCIe, LVDS, SPI, AXI, USB etc. interfaces.
• Ability to design using primitives instead of inferred design from RTL.
• Embedded linux device drivers, petalinux, exposure to yocto project.
• Exposure to various compression algorithms.
Desired Qualification/Experience
• Talent and zeal to work with new challenging system designs.
• Thorough understanding of digital systems.
• Hands-on experience on the RTL design, preferably with a repository of previous
projects

Position Vacant: FPGA Developer
Organization Name
AVANTEL LIMITED
Company Profile
AVANTEL LIMITED is a technology driven public limited company with focus on developing innovative wireless communication products and solutions to meet unique requirements of defense, railways, and telecom sectors. The organization is certified against AS 9100D and ISO 9001:2015 standards for Quality Management System. For more details visit www.avantel.in.
Industry
Electronics /Telecommunications
Qualification
B.Tech/ M. Tech. degree in Embedded Systems / Signal processing / VLSI
Desired Skills / Responsibilities
Mandatory Skills/ Knowledge :
· Coding and Debugging in C language /Coding and Debugging in Verilog - VHDL
· Knowledge of signal processing algorithms related to Digital communication such as Digital Filters, FFT, Modulation, Demodulation, Carrier / Symbol Tracking etc.
· Thorough knowledge on Xilinx, Spartan 6 & 7 Board. A hand on experience is a must on above.
· Programming knowledge of Hardware and Firmware
· Development Life Cycle processes for embedded systems
Preferable: The Experience must be in the area(s) of
· Realization of Real Time Digital Signal Processing and / Or
· Realization of real time Digital Communications
· Knowledge in FPGA is Mandatory
Desired profile of the candidate
· Good communication skills
· Good academic record
· Min 70% above in B.Tech
Experience
5-10 Years (Should be trained in C & Embedded courses also on FPGA.)
Interview Mode
Face to Face (or) Virtual
Location of posting
Hyderabad/Visakhapatnam
Shift Timings
8:30 AM to 5:30 PM
Working Days
6 Days (Sunday is Off)
- Coding and Debugging in C language.
- Knowledge on ARM based architectures of 8/16/32 Microcontrollers,UART, ADC, DAC,Ethernet, SPI,CAN,I2C and I2S.
- FPGA RTL coding and Simulation using Verilog/VHDL
Qualification - BE/B.Tech (ECE), M.Sc.(Electronics)
Only Defense and Aerospace, Electronics, Semi-Conductors,
(No Automative industry)
AVANTEL LIMITED is a technology driven public limited company with focus on developing innovative wireless communication products and solutions to meet unique requirements of defense, railways, and telecom sectors. The organization is certified against AS 9100D and ISO 9001:2015 standards for Quality Management System. For more details visit www.avantel.in.
Job Description
Extensive hands on and teaching experience on Digital / SV /UVM/ Verilog / VHDL /DFT tools
Extensive experience in Back-end design
Experience on Mentor Graphics EDA flow is an added advantage
Responsible for development and support of Projects.
Responsible for Debugging the source codes in Verilog, SV, and UVM.
Responsible for Training Delivery and Support
Desired Candidate Profile
Sound Knowledge on Digital / Verilog / VHDL / SV / UVM / DFT / Back-end design
3 to 8 years industry/teaching experience
Good communication skill

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5+yrs with WINDOWS DRIVER DEVELOPMENT in is MUST
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Hands on EXP in C++ Programming is MUST
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Understanding of FIRMWARE and HARDWARE DESIGN principles.
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EXP in LAPTOP and DESKTOP domain
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Hands on EXP in JENKIN and GITHUB
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EXP or understanding of FIRMWARE DESIGN TOOLS and LANGUAGES.