

DesignNex Technologies
https://designnex.com/About
โจ ๐๐ก๐ฒ ๐๐๐ฌ๐ข๐ ๐ง๐๐๐ฑ?
DesignNex is your premier partner for Silicon and Product Engineering talent. Our curated network of top-tier professionals empowers you to craft cutting-edge designs and products, ensuring you stay ahead in today's competitive market.
๐ฏ ๐๐ฎ๐ซ ๐๐ข๐ฌ๐ฌ๐ข๐จ๐ง
DesignNex's mission is to bridge talent and opportunity, fostering mutual success as a premier partner for clients and engineering professionals.
๐ญ ๐๐ฎ๐ซ ๐๐ข๐ฌ๐ข๐จ๐ง
At DesignNex, we aim to be key growth catalysts in the engineering services sector, committed to being our clients' top service partner.
๐ก ๐๐ฎ๐ซ ๐๐จ๐ซ๐ ๐๐๐ฅ๐ฎ๐๐ฌ:
๐๐ผ๐น๐น๐ฎ๐ฏ๐ผ๐ฟ๐ฎ๐๐ถ๐ผ๐ป: Promoting teamwork and synergy
๐๐ฟ๐ผ๐๐๐ต: Continuous learning & development
๐๐ ๐ฐ๐ฒ๐น๐น๐ฒ๐ป๐ฐ๐ฒ: Top-notch service providers
๐๐ป๐๐ฒ๐ด๐ฟ๐ถ๐๐: Honesty, transparency & ethical conduct in all interactions
Tech stack
Candid answers by the company
DesignNex is your premier partner for Silicon and Product Engineering talent. Our curated network of top-tier professionals empowers you to craft cutting-edge designs and products, ensuring you stay ahead in todayโs competitive market.
Jobs at DesignNex Technologies

The recruiter has not been active on this job recently. You may apply but please expect a delayed response.
Are you a motivated and knowledgeable engineer ready to make a significant impact in the world of advanced technology? Designnex is on the lookout for a dynamic Design Verification Engineer to join our innovative team. In this exciting role, you will collaborate closely with customers to verify cutting-edge Interface IP (IIP) in their ASIC SoC/systems for groundbreaking next-generation products.
Key Responsibilities:
- Collaborate with customers to verify cutting-edge IPs in their ASIC SoC/systems.
- Provide support throughout the ASIC design cycle, focusing on design verification.
- Engage with the latest industry specifications and applications.
- Work with a diverse, worldwide team and interact with industry experts and leaders.
Key Qualifications:
- Experience: At least 2 years of related ASIC design verification experience. Strong academic backgrounds with relevant knowledge considered.
Skills:
- Experience in IP design verification flow of ASIC/SoC design (e.g., simulation, verification, RTL synthesis).
- Advanced lab experience (e.g., ATE, high-speed interface IP bring-up).
- Strong communication skills and ability to interact with peers from different geographies.
- Proficiency in UVM and SystemVerilog.
- Good to Know: PCIE and CXL specifications and design verification.
Preferred Experience:
- Technical knowledge of Interface IPs such as PCIe, Ethernet Protocols, Specification, Design, Verification, and Implementation.
- Proven track record in meeting tight schedules and handling multiple projects concurrently.
- Experience in various ASIC design cycles, including HIP/SIP integration into high-scale SoCs, design verification flows, physical implementation, SI/PI, and silicon bring-up in the lab.
Join Designnex and be part of a team at the forefront of technological advancements. Apply today and help shape the future of ASIC design and integration!

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