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Kernel Programming Jobs in Delhi, NCR and Gurgaon

2+ Kernel Programming Jobs in Delhi, NCR and Gurgaon | Kernel Programming Job openings in Delhi, NCR and Gurgaon

Apply to 2+ Kernel Programming Jobs in Delhi, NCR and Gurgaon on CutShort.io. Explore the latest Kernel Programming Job opportunities across top companies like Google, Amazon & Adobe.

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NX Block Trades Private Limited
Delhi, Gurugram, Noida, Ghaziabad, Faridabad
2 - 6 yrs
₹20L - ₹40L / yr
PySpark
Data engineering
Big Data
Hadoop
Spark
+4 more

NX Block Trades Pvt Ltd is an innovative high-frequency trading firm, leveraging advanced technologies to create ultra-low-latency trading solutions. We are seeking an FPGA Developer with deep technical expertise to design, develop, and optimize FPGA-based trading solutions for high-frequency and medium-frequency trading environments.


Key Responsibilities:

• Lead the design, development, and optimization of FPGA-based trading solutions aimed at achieving ultra-low-latency in HFT (High-Frequency Trading) and MFT (Medium-Frequency Trading) environments.

• Perform FPGA architecture exploration, design partitioning, and performance analysis to optimize system performance.

• Develop and implement assembly-level coding at both hardware and kernel levels to ensure efficient FPGA performance.

• Test and validate FPGA designs for correctness, robustness, and compliance with functional and performance requirements.

• Work with teams across the firm, including software engineers, traders, and quantitative analysts, to integrate FPGA-based solutions into trading algorithms, order management systems, and market data processing pipelines.

• Lead efforts in setting up FPGA solutions over collocated servers at exchanges for improved latency reduction.

• Provide guidance on networking fundamentals and ensure seamless integration with trading platforms, especially NEAT, BOLT, and NNF systems.


Essential Qualifications and Skills:

• 5-7 years of relevant experience in FPGA development for HFT firms.

• Hands-on experience in FPGA architecture exploration, design partitioning, and optimization.

• Proficiency in hardware-level and kernel-level coding, with strong experience in assembly language.

• Strong understanding of networking fundamentals as applied to FPGA-based systems.

• Proven ability to perform FPGA design validation, testing, and performance tuning.

• Experience working with collocated servers at exchanges. • Must have experience integrating FPGA systems with NEAT, BOLT, and NNF systems.

• Top-tier educational background from Tier 1 colleges with a Master’s/PhD in Electrical Engineering, Computer Science, or related fields.

• Strong mathematical skills and the ability to apply mathematical principles to hardware design and performance optimization.


Preferred Qualifications:

• Master’s/PhD in Electrical Engineering or Computer Science from a Tier 1 institute.

• Hands-on experience working in high-frequency trading (HFT) environments.

• Strong knowledge of FPGA development frameworks and synthesis tools.

• Demonstrated experience in networking, systems design, and FPGA performance analysis

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Cohesity

at Cohesity

1 video
2 recruiters
Swetha Puttarajappa
Posted by Swetha Puttarajappa
Bengaluru (Bangalore), NCR (Delhi | Gurgaon | Noida), Pune, Mumbai, Chennai
1 - 7 yrs
₹25L - ₹40L / yr
Kernel Programming
Linux/Unix
Storage & Networking
VMWare
Hyper V
+3 more
Requirements : 1-7+ years of hands-on experience in Designing, architecting & developing enterprise grade high quality products. • BS/MS/PhD in Computer Science or EE degree • Strong programming and scripting skills. Hands-on programming experience required  as this is a development position. • Strong experience with linux networking or storage stack, bonding driver, system calls and configuration. • Hands-on experience with high scale enterprise data center networking (TCP/IP, VLANs). Virtualized networking (VMWare HyperV, VxLAN). Experience with network load balancing technologies, Networking security technologies Familiarity with networking operations (Reliability, Availability, SLAs, Monitoring).  OR • Experience with storage stack (HBA driver, SCSI, SATA/SAS, NVMe storage protocol)   • Open source technologies for messaging, eventing, database, distributed services etc) networking and security. • Storage experience and working knowledge of public clouds (Google, AWS, Azure) is a plus. Responsibilities:   For Junior Engineers 3-8 years: • Design and develop platform and cluster management solutions and troubleshoot. • Drive the design and implementation of monitoring, alerting and hardware lifecycle management workflows for the cluster. • Implement backend changes and REST APIs for supporting UI features for cluster management and usability improvements.   For Senior Engineers 8+ years: • Drive a  team of world-class engineers to design and develop platform and cluster management solutions. • Drive the design and implementation of monitoring, alerting and hardware lifecycle management workflows for the cluster. • Design, mentor, implement, and, troubleshoot complex Distributed File System features. • Work with product management to drive the networking feature roadmap for Cohesity’s infinitely scalable storage appliance. • Work with enterprise customers to address performance, security and isolation requirements and build product features for manageability. • Give technical feedback and drive quality via code reviews. • Work closely with various stakeholders within Cohesity like product management, sales, QA, support and executive team to deliver high quality features and drive the product roadmap. • Mentor junior members of the team
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