Layout Design Engineer - Analog
at Leading Semiconductor company with focus on Memory & Analog
Responsibilities
- Provide leadership in building and growing a Custom layout team from the ground up to support the global DRAM layout requirement;
- Provide leadership in developing Analog and custom layouts to meet schedules and milestones;
- Provide leadership in training the team’s technical skills and cultural healthiness.
- Effectively communicating with engineering teams across multiple countries to ensure the success of the layout project.
- Organize, prioritize, and manage logistics on tasks and resource allocations for multiple projects.
- Manage the performance and development of team members.
- Managing hiring and retention.
- As a critical member of the core DRAM leadership team in India, contributed to the overall success
Qualification/Requirements
- 5 + year experience in analog/custom layout in advanced CMOS process.
- Minimum 3+ years people management experience.
- Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must.
- Must have strong skills in layout and floor planning skills and manual routing.
- Strong ability to build, and continuously develop a premier analog/mixed-signal layout team
- Experienced in managing multiple Custom IC layout projects
- Highly motivated with passion, detail-oriented, systematic, and methodical approach in IC layout design.
- The ability to work and communicate effectively in a team and to be able to multi-task effectively in a fast-paced working environment.
- Excellent verbal and written communication skills required.
- Independent with strong analytical skills, creative thinking and self-motivation.
- Capable of working in a cross-functional, multi-site team environment in multiple time zones.
- Previous work experience in DRAM/NAND layout design is desirable however not mandatory.
Subodh Popalwar
Software Engineer, Memorres
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