Senior/Staff Software Engineer – EDA

Key Responsibilities

1. Kernel Lifecycle & Maintenance

Upstream Alignment: Lead the strategy for upgrading enterprise kernels (e.g., migrating from LTS 5.15 to 6.6) while maintaining binary compatibility where required.

Patch Porting: Expertly port functional and performance patches between disparate kernel versions, resolving complex code conflicts and API changes.

CVE Mitigation: Monitor the Linux Kernel Mailing List (LKML) and security advisories to identify and backport CVE patches from upstream to production environments.

2. Deep-Dive Debugging & Stability

Panic Analysis: Act as the final escalation point for Kernel Panics and "Oops" messages. Utilize kdump, crash, and gdb to perform post-mortem analysis of vmcores.

Boot-Time Resolution: Debug critical failures during the early boot process (UEFI handoff, initramfs, and early kernel init) where standard logging is unavailable.

Performance Tuning: Use ebpf, ftrace, and perf to identify bottlenecks in memory management, scheduler latency, or I/O throughput.

3. Driver Development & Hardware Integration

Driver Ownership: Design, develop, or maintain at least one Open Source or Proprietary Device Driver (Network, Storage, GPU, or Character devices).

Hardware Abstraction: Interface directly with hardware registers, managing DMA mappings, and optimizing interrupt handling (MSI-X, Threaded IRQs).

Out-of-Tree Management: Maintain driver compatibility across kernel updates using DKMS or similar frameworks.

4. Infrastructure & Automation

Registry Management: Oversee the distribution of custom kernel builds and modules via GitLab Container/Package Registries.

CI/CD for Kernel: Build automated testing pipelines (Hardware-in-the-loop) to validate kernel stability before enterprise-wide deployment.

Required Technical Skills:

Languages: Mastery of C/C++ Programming (C is preferred)

Kernel Internals: Deep understanding of VFS, Memory Management (MMU/Paging), Process Scheduling, and Networking Stacks.

Debugging Tools: Expert-level use of kprobes, trace-cmd, valgrind, and hardware-level debuggers (JTAG/Serial Console).

Build Systems: Proficiency with Kbuild, Makefiles, and building RPM/Debian packages for kernel distribution.

Security: Hands-on experience with SELinux/AppArmor policy development and kernel hardening (FIPS, KSPP).

Job Title: Senior Software Engineer (6-Month Contract)

Location: Bengaluru

Experience: 8+ Years

Mandatory Skills:

• C++ and C# programming
• Windows system-level programming
• Strong OOP, data structures, algorithms, and design patterns

Desired Skills:

• Knowledge of security fundamentals (authentication, cryptography)
• Familiarity with networking protocols (TCP/IP, TLS/SSL)
• Experience with REST clients and Windows security mechanisms

Responsibilities:

• Design, develop, and maintain Windows-based applications
• Write clean, efficient code and perform code reviews
• Collaborate with team members and communicate effectively
• Contribute to testing strategies and ensure software quality
• Prepare technical documentation and provide project status updates

Soft Skills:

• Self-driven and proactive
• Strong communication and teamwork skills

Contract Duration: 6 months

About Monarch: 

At Monarch, we’re leading the digital transformation of farming. Monarch Tractor augments both muscle and mind with fully loaded hardware, software, and service machinery that will spur future generations of farming technologies. 

With our farmer-first mentality, we are building a smart tractor that will enhance (not replace) the existing farm ecosystem, alleviate labor availability, and cost issues, and provide an avenue for competitive organic and beyond farming by providing mechanical solutions to replace harmful chemical solutions. Despite all the cutting-edge technology we will incorporate, our tractor will still plow, till, and haul better than any other tractor in its class. We have all the necessary ingredients to develop, build and scale the Monarch Tractor and digitally transform farming around the world. 

Description: 

We are looking for engineers to work on applied research problems related to control in autonomous driving of electric tractors. The team works on path planning and control to deploy on resource constrained hardware.  

Technical Skills: 

• Necessary Skills: C++, Eigen, Boost, ROS. 
• Solid theoretical knowledge in Linear Algebra and Differential Equations, Control systems, Model Predictive Control, Robotics. 
• Knowledge of some numerical algorithms or libraries among: IPOPT (cppAD), HPIPM would be a plus. 
• Experienced candidates in ROS & C++ projects with no prior control experience willing to apply their knowledge to vision problems are also encouraged to apply. 
• Experience in simulation frameworks such as Gazebo would be a plus. 

Responsibilities: 

• Ability to formulate math for a given problem statement/approach and prototype in C++. 
• Work in conjunction with other sub-systems for integration. 
• Testing/tuning the controller in simulation and on real-world hardware. 
• Communicate and collaborate with team members in India and abroad for the fulfillment of your duties and organizational objectives. 
• Thrive in a fast-paced environment and can complete the assigned sub-task. 

What you will get: 

At Monarch Tractor, you’ll play a key role on a capable, dedicated, high-performing team. Our compensation package includes a competitive salary, excellent health, benefits commensurate with the role you’ll play in our success.  

1. Developing HMI application in Qt or similar UI frameworks
2. Develop C++ or Rust backends for the HMI
3. Understand and optimize potential performance bottlenecks

* Experience in C/C++ and have strong experience embedded application development and integration in Linux

* Good in creating unit tests, performing code reviews, optimizing performance and ensuring standards for maintainability  

* Debugging, profiling, and performance optimization skills

INNOPHASE is a rapidly growing communications semiconductor startup with headquarters located in San Diego, CA. It is an exciting time to join InnoPhase and work with a brilliant team of engineers to design innovative wireless products and solutions for IoT/5G.

InnoPhase Bangalore is looking for a Senior Design Verification (DV) Engineer to join a growing start up semiconductor development organization and to help drive excellence in our IOT/5G products.

Responsibilities:

• Follow and help define the team's design verification methodology.
• Write bus functional models that drive and monitor stimulus.
• Plans and implements block and integration level scoreboards and checkers to verify functional behavior.
• Experience constructing chip-level System Verilog and UVM test bench environments, writing System Verilog Assertions (SVAs), with embedded software design and test.
• Develop RAL test plan at SOC/IP level and its implementation.
• Write and analyze functional coverage, providing input to block-level milestones.
• Triage regression failures and identify logic bugs, while driving bug closure.
• Debug test cases and report verification results to achieve the expected code/functional coverage goal. Utilize constrained random verification, functional coverage, code coverage and assertions to achieve goals.

Knowledge and Skills Required:

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science or equivalent.
• 5+ years of experience in VLSI design or verification
• Excellent collaboration, teamwork and communication skills
• Significant experience in reviewing and modifying IP block verification plans, a real plus if created such plans in collaboration with design engineering.
• Track record of completing IP block verification to acceptable coverage metrics.
• Excellent debugging skills, with experience debugging RTL in the block and/or chip-level environments.
• Working knowledge of OVM or UVM methodologies.
• Good analytical and problem-solving skills.
• Proficient knowledge of programming and scripting, hardware description language, electronic design automation (EDA), and/or FPGA tools.