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Job Title : Hardware Design Developer – Verilog
Employment Type : Full-Time Contract (8 hours/day)
Location : Remote
Experience : 3+ Years (Mandatory)
Notice Period : Immediate
Job Overview :
We are looking for an experienced Hardware Design Developer to leverage hardware design platforms for generating training data to enhance enterprise LLMs' capabilities. This role offers a unique opportunity to directly impact AI advancements by optimizing hardware designs for training and benchmarking large language models.
Key Responsibilities :
- Develop, configure, and customize hardware design platforms to generate training data for enterprise LLMs.
- Work closely with research teams to translate requirements into actionable insights.
- Ensure high-quality coding, debugging, and documentation to optimize hardware design solutions.
- Collaborate with cross-functional teams to improve LLM performance and automation capabilities.
Required Skills & Experience:
- BS/MS in Electrical Engineering or related field.
- 3 to 5 Years of hardware design development experience.
- Expertise in HDLs (Verilog, SystemVerilog, VHDL, SystemC).
- Strong background in scripting, front-end workflows, and verification processes.
- Familiarity with Synopsys, Cadence, or open-source toolchains.
- Excellent problem-solving and collaboration skills.
Preferred Qualifications :
- Expertise in UVM environments, Formal Verification, and Lint refinement.
- Experience with Computer Architecture, Assembly Debugging, and Assertion Coding (SVA).
- Familiarity with Machine Learning and AI systems.
Mandatory Technical Skills :
- Min 2 Years of relevant experience in Hardware Design and/or Verification.
- Experience with at least one of the following:
- ASIC, VLSI, FPGA, SoC development.
- SystemVerilog, Verilog, Testbench development, and Verification.
- Strong understanding of IP Development and Verification.
Note: This role focuses on LLM training using hardware design, not traditional project development.

