
About the organization
QFocus AI Pvt. Ltd. (QFAI), a wholly owned subsidiary of QFocus Technologies LLC, is a consulting-led engineering services company with sharp focus on supporting next gen advanced products development across AI/ML, Compute, Communication, Storage and Consumer Electronics. Our mission is to help our customers deliver cutting-edge products on time ensuring world-class quality.
Why Join QFAI? Join a passionate team, dedicated to making a difference.
We are a close-knit team, with strong mission, vision and values that guide our day-to-day. Recognition of work, respect, and our multicultural community are key aspects of the employee experience and contribute to our continued success. Would you like to be part of our story? Don't hesitate, come and join us!
About this opportunity – Formal Verification Engineer
We are seeking a highly skilled and passionate Formal Verification Engineer to join our team working with the best in the Industry, developing innovative ASIC solutions for data center and AI Infrastructure. The ideal candidate will develop comprehensive formal test plans and be responsible for complete formal verification sign-off of single or multiple complex blocks. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success.
Key Responsibilities:
· Contribute to Formal Verification applying and evangelizing state of the art Formal Verification Methodologies across IP-level, subsystem-level and SOC Level.
· Collaborate with Architecture and Design teams to develop formal specifications and implementations.
· Define formal verification scope, create formal environments, and achieve coverage sign-off using targeted formal verification techniques.
· Develop comprehensive formal test plans, including unique security requirement verification.
· Build reusable and scalable formal verification environments and deploy relevant tools.
· Evaluate and recommend EDA solutions for Formal Verification and drive improvements to methodologies and flows.
· Debug complex issues in RTL designs based on formal results and contribute to design improvements.
Required Skills:
- Strong hands-on experience with Formal Verification tools (e.g., JasperGold, VC-Formal, Questa Formal).
- Experience writing formal properties using System Verilog Assertions (SVA) or Property Specification Language (PSL).
- Proven understanding of Formal Verification methodologies, complexity reduction techniques, and abstraction techniques.
- Fluency in hardware description languages, such as SystemVerilog.
- Proficiency in scripting languages such as Python, Perl, or Tcl within Unix/Linux environments.
Education:
Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field, or equivalent practical experience.
Experience:
5+ years of experience in Design Verification, with at least 1 year in Formal Verification.
QFocus AI Pvt Ltd is an Equal Employment Opportunity employer.

Similar jobs
- Create/modify scripts using a scripting language such as Perl and the Bitbucket REST API to disable users who have not logged in within a certain timeframe, and to monitor user project/repo permissions based on last commit date/time.
- Every 3 months, run the Jenkins jobs to reprovision the Bitbucket test servers, verify Bitbucket functions properly, then plan and execute the reprovisioning of the production Bitbucket servers
- Every 2 years, plan, install and deploy the latest Bitbucket version in our test environment, updating the Terraform code and Artifactory as required. Upgrade all plugins, test thoroughly, and work with various development teams to have them test as well. Once testing is complete and sign-off has been achieved, plan and run the Jenkins jobs to deploy the latest version of Bitbucket to the production servers.
- Create scripts using a scripting language such as Perl and the Confluence and/or Atlassian Access REST API to disable users who have not logged in within a given amount of time
- Good to have knowledge on BigPicture, EasyBI, Report2Web
Critical Skills to Possess:
- 5+ years of experience in JIRA administration and Bitbucket
- Experience in Jira, Bitbucket application upgrade on data center.
- Experience re-provisioning of Bitbucket using Jenkins.
- Excellent in Groovy, Java scripting and Perl.
- Experience in SSO implementation on Atlassian tool
- Experience in Atlassian and third part application integration.
- Strong problem solving and analytical skills to solve problems at their root.
- Excellent time management and prioritization of tasks
Must have: ATLASSIAN PTY LTD Ver 7.17.0, Atlassian Cloud, ATLASSIAN PTY LTD Ver 8.6.1 Perl/Python, VB Script, Bitbucket REST API, Bitbucket SSH API, JQL
Good to have: Tomcat, Git, SourceTree, Linux, Terraform, Azure AD SSO, Oracle DB
Preferred Qualifications:
BS degree in Computer Science or Engineering or equivalent experience
Roles & Responsibilities
Roles and Responsibility:
1. Upgrade & Maintenance Expertise
- Proven experience upgrading Jira and Bitbucket (Server or Data Center):
- Integration with Jira and webhook/API-based automation
- Perform pre-upgrade tests and staging environment setup
- Apply patches, hotfixes, and troubleshoot upgrade failures.
- YAML configuration for builds, tests, deploys.
2. System Administration
- Proficiency with Linux/Unix OS (file systems, services, shell scripting)
- Manage file permissions, processes, and system logs
- Deep understanding of project configurations (schemes, workflows, screens, custom fields)
- Advanced Jira workflow design (including conditions, validators, post-functions)
- Automation using Groovy scripting
3. Network Config, Authentication & Security
- Manage SSL certificates, custom domains, and HTTPS configurations
- Integration with LDAP / Active Directory and troubleshooting of SAML SSO (Okta, Azure AD, etc.)
4. CI/CD Pipelines (Bitbucket Pipelines):
- Running pipeline for the OS remediation


- Coding and Debugging in C language.
- Knowledge on ARM based architectures of 8/16/32 Microcontrollers,UART, ADC, DAC,Ethernet, SPI,CAN,I2C and I2S.
- FPGA RTL coding and Simulation using Verilog/VHDL
Qualification - BE/B.Tech (ECE), M.Sc.(Electronics)
Only Defense and Aerospace, Electronics, Semi-Conductors,
(No Automative industry)
AVANTEL LIMITED is a technology driven public limited company with focus on developing innovative wireless communication products and solutions to meet unique requirements of defense, railways, and telecom sectors. The organization is certified against AS 9100D and ISO 9001:2015 standards for Quality Management System. For more details visit www.avantel.in.


Summary:
Hyperspec is building a real time local map for self-driving cars and using cross view localization to enable ubiquitous autonomy. Hyperspec is a VC funded startup.
The principal embedded systems engineer will have deep expertise in embedded systems design, development and worked for years on embedded systems teams. This person is a leader and mentor to junior engineers and shares knowledge about the design and development of embedded systems.
Responsibilities:
- Serves as an expert in all aspects of embedded projects and embedded systems—including designing, developing, testing, and perfecting designs
- Responsible for updating and working with executive leadership on the development of embedded systems and status of projects
- Provides guidance and mentoring to other members of the team
Requirements:
- Minimum of bachelors' degree in computer science or engineering
- At least ten years of engineering experience with expertise in software engineering, data structures, and programming techniques
- Deep expertise in C/C++ programming
- Experience with FPGAs, PCB, Xilinx, Altera, or similar SoCs.
- Experience with ISPs, Cameras, Switches a plus.
- Experience in working with real-time operating systems, communications protocols and firmware design.
- Experience in interfaces, IP protocols, and hardware subsystems.
- Experience in working as part of a team and leading teams.
INNOPHASE is a rapidly growing communications semiconductor startup with headquarters located in San Diego, CA. It is an exciting time to join InnoPhase and work with a brilliant team of engineers to design innovative wireless products and solutions for IoT/5G.
InnoPhase Bangalore is looking for a Senior Design Verification (DV) Engineer to join a growing start up semiconductor development organization and to help drive excellence in our IOT/5G products.
Responsibilities:
- Follow and help define the team's design verification methodology.
- Write bus functional models that drive and monitor stimulus.
- Plans and implements block and integration level scoreboards and checkers to verify functional behavior.
- Experience constructing chip-level System Verilog and UVM test bench environments, writing System Verilog Assertions (SVAs), with embedded software design and test.
- Develop RAL test plan at SOC/IP level and its implementation.
- Write and analyze functional coverage, providing input to block-level milestones.
- Triage regression failures and identify logic bugs, while driving bug closure.
- Debug test cases and report verification results to achieve the expected code/functional coverage goal. Utilize constrained random verification, functional coverage, code coverage and assertions to achieve goals.
Knowledge and Skills Required:
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science or equivalent.
- 5+ years of experience in VLSI design or verification
- Excellent collaboration, teamwork and communication skills
- Significant experience in reviewing and modifying IP block verification plans, a real plus if created such plans in collaboration with design engineering.
- Track record of completing IP block verification to acceptable coverage metrics.
- Excellent debugging skills, with experience debugging RTL in the block and/or chip-level environments.
- Working knowledge of OVM or UVM methodologies.
- Good analytical and problem-solving skills.
- Proficient knowledge of programming and scripting, hardware description language, electronic design automation (EDA), and/or FPGA tools.
- Essential Skills and Experience
- Experience in designing and implementing verification environments for complex RTL designs
- Well-versed in the use of hardware verification languages e.g. SystemVerilog or Specman e
- Verification methodologies such as UVM
- Understanding of end-to-end verification processes, from test plan creation through to verification closure
- Ability to quickly understand and apply complex specification detail
- Understanding of the fundamentals of computer architecture, with an emphasis on pipelining, exception handling, memory systems
- Practical experience of working on microprocessor designs
- In-depth understanding of memory protection, memory translation, vector processing in CPUs, exception and interrupt handling.
- Understanding of constrained random stimulus, the goals and general usefulness of different types of coverage in hardware, as well as checking methodologies and behavioral functional models.
- Knowledge of assembly language (preferably Arm), and/or C/C++
- In-depth technical reviewing of others work
About Company
Espressif Systems is a multinational, fabless semiconductor company established in 2008, with headquarters in Shanghai and offices in Greater China, India and Europe. We have a passionate team of engineers and scientists from all over the world, focused on developing cutting-edge WiFi-and-Bluetooth, low-power, IoT solutions. Among our popular products are the ESP8266 and ESP32 series of chips, modules and development boards. Espressif has opened a Technology Center in Pune(Baner), India, which will focus on embedded software engineering and IoT solutions development for our growing customers.
At Espressif, communication, collaboration and innovation are of paramount importance. That's why professionals and engineers from around the world have chosen to further their careers at Espressif Systems. They are passionate and committed to developing innovative products. And they are here to ensure that fast,secure and green IoT technology can be available to all. Come and join Espressif, so that you, too, can partake in Espressif's mission in the IoT industry.
BASIC QUALIFICATIONS
- M.Tech/B. Tech in the field of VLSI/Electronics engineering.
- Proficiency in UVM/SV and C/C++ based functional verification
- Experience in UPF based low power design verification
- Automation skills in PERL and/or TCL and/or Shell*
- Team player, with good problem solving and communication skills.
JOB DESCRIPTION
- Drive functional verification at IP/SoC level using UVM/SV test bench
- Work closely with design team to define comprehensive feature test plans
- Perform functional and code coverage for logic verification sign-off
- Must have worked on ARM/RISC-V CPU based designs
- Must have performed gate level sim at SoC level
- Pre and Post-silicon debug/validation experience will be a plus
INTERPERSONAL SKILLS:
- Energetic, self-motivated
- Pro-active, oriented on execution
- Attentive to details and quality
- Team player
- Good communications and reporting skills



