Datapower Consultant

Job title: DLP Engineer

Work Location- Delhi

Experience- 2+ Years

Mandatory Requirements:

1- 2 years experience installing Forcepoint Cososys or Netskope.

2- Should have own conveyance.

Job Description:

· Deploy and configure DLP solutions such as Forcepoint, CoSoSys, or Netskope across endpoints, networks, and cloud environments.

· Customize DLP policies and rules to address organizational data security needs.

· Continuously monitor data flow and detect unauthorized access or data exfiltration attempts.

· Analyze DLP alerts and logs to identify potential threats and escalate as necessary.

· Develop, implement, and manage DLP policies to prevent data breaches and leaks.

· Integrate DLP solutions with other security tools, including SIEM.

· Provide technical support for DLP tools and resolve related issues promptly.

· Stay updated with the latest trends and advancements in DLP technologies, particularly Forcepoint, CoSoSys, and Netskope.

Working Days: 6 days working, Monday to Saturday (3rd Saturday off)

Are you a motivated and knowledgeable engineer ready to make a significant impact in the world of advanced technology? Designnex is on the lookout for a dynamic Design Verification Engineer to join our innovative team. In this exciting role, you will collaborate closely with customers to verify cutting-edge Interface IP (IIP) in their ASIC SoC/systems for groundbreaking next-generation products.

Key Responsibilities:

• Collaborate with customers to verify cutting-edge IPs in their ASIC SoC/systems.
• Provide support throughout the ASIC design cycle, focusing on design verification.
• Engage with the latest industry specifications and applications.
• Work with a diverse, worldwide team and interact with industry experts and leaders.

Key Qualifications:

• Experience: At least 2 years of related ASIC design verification experience. Strong academic backgrounds with relevant knowledge considered.

Skills:

• Experience in IP design verification flow of ASIC/SoC design (e.g., simulation, verification, RTL synthesis).
• Advanced lab experience (e.g., ATE, high-speed interface IP bring-up).
• Strong communication skills and ability to interact with peers from different geographies.
• Proficiency in UVM and SystemVerilog.
• Good to Know: PCIE and CXL specifications and design verification.

Preferred Experience:

• Technical knowledge of Interface IPs such as PCIe, Ethernet Protocols, Specification, Design, Verification, and Implementation.
• Proven track record in meeting tight schedules and handling multiple projects concurrently.
• Experience in various ASIC design cycles, including HIP/SIP integration into high-scale SoCs, design verification flows, physical implementation, SI/PI, and silicon bring-up in the lab.

Join Designnex and be part of a team at the forefront of technological advancements. Apply today and help shape the future of ASIC design and integration!

• At least 3 years of C++ programming experience in a Linux environment.
• Strong understanding of computer systems e.g. operating systems, networks, performance optimization, etc
• Experience in Object-Oriented design and multi threaded programming
• Experience in creating/supporting cross-platform multi threaded applications
• Strong analytical and problem solving skills
• Ideally some experience in developing low latency systems
• Experience with trading or execution systems preferred
• Bachelor's degree in Computer Science or Computer Engineering or related field
• Reliable and predictable availability
• 
  
  Ideally in Mumbai Metro Area but open to anywhere for the right candidate.

Job Description

Embedded Software/Firmware Design and Development on OS/Non-OS based platform

Necessary system architecture development and implementation

Device, sensor and gateway selection and integration based on industry use case.

Development on Image Analytics and Cloud/Platform integration

Development or integration of Cloud/Platform communication protocol

Technical Documentation and Testing of the developed system

Desired Skills, Knowledge& Experience

B. Tech/M. Tech/MCA with 8-10 years of industry experience

Strong programming skills in C/C++ and Python development in Linux

Experience in device or sensor communication interfaces (wired/wireless, short range/long range).

Experience of microcontroller and microprocessor.

Knowledge of IoT gateway firmware development, container, and OS hardening.

Experience in device communication protocol, Edge computing and processing

Competent in application development for Image processing, transmission, and storage

Good understanding and of programming primitives, data structures, multi-threading and memory management techniques

Strong command over complex sensor and hardware control logic to work seamlessly with edge devices or gateway

Proactive and Self motivated

Strong verbal and written communication skill

• Experience in Windows NDIS networking driver development.
• Experience in developing and maintaining of Network drivers and/or IWARP drivers and/or TCP offload drivers and/or iSCSI drivers and/or FCoE drivers is preferable.
• Experience in analyzing and debugging kernel crash dumps.

• RDMA/IWARP/RoCE, TCP offload, iSCSI, FCoE, FC, Networking device drivers.
• Good knowledge in TCP/IP.
• Performance tuning, crash dump analysis, solving critical customer issues

You’ll be our: Firmware Engineer

You’ll be based at: IBC Knowledge Park, Bengaluru

You’ll be Aligned with: Embedded Manager

You’ll be a member of: Vehicle Software

What you’ll do at Ather:

A successful candidate is expected to lead the Firmware development and integration effort for various Ather products and be responsible for qualifying and integrating FW at various stages with HW. Responsibilities include:

• Understanding requirements from different stakeholders and translating these to application features

• Writing high quality source code to program complete applications within deadlines

• Unit-testing code for robustness, including edge cases, usability, and general reliability

• Performing functional and non-functional testing

• Troubleshooting and debugging applications

• Designing creative prototypes according to specifications

• Evaluating existing applications to reprogram, update and add new features

• Developing technical documents and handbooks to accurately represent application design and code

• Identifying and communicating possible risks along with preventive and corrective measures

• Designing HW/SW integration while working with HW/Algorithms/Cloud teams to deliver an integrated solution. 

Here’s what we are looking for: 

Must have: 

• ECU Software development experience (any of the ARM based Auto ECUs Body Electronics/Infotainment/ Powertrain/Cluster) 

• Previous experience with Low level firmware, Boot loaders, Device Drivers development 

• Hands on Experience Communication Protocols CAN, I2C, SPI, RS232

• Experience with static analyser, JTAG tools etc…

• Knowledge in Assembly and compilers

• Strong testing & debugging skills, experience with logic analysers

• Language: C, C++

Nice to have:

• Knowledge of HW design for ECUs

• Experience with UDS, AutoSAR, ISO26262, MISRA Guidelines 

• Previous experience with SIL and HIL Testing as well as Test case generation for the same.

• Hand on experience in using CAN tools & CAPL Scripts, Bus Master

• Real Time operating Systems, Python, Matlab/Simulink

You bring to Ather:

• BE/B.tech/B.Sc is minimum req with minimum 2-6 years of prior industry experience.