Sr. Manager – System Hardware

Interested in designing award-winning wearables while managing challenging constraints so that your products are used everyday by millions of users? Then read on..

ULTRAHUMAN • HARDWARE

Hardware Design Engineer Wearables

Bangalore (Kudlu Gate)| • On-site | Full-time |

ABOUT THE ROLE

Ultrahuman's Hardware division builds award-winning wearables the Ultrahuman Ring and Ring Air pushing consumer technology in health and metabolic fitness. We're looking for a Hardware Design Engineer to own electronics design for our next-generation smart rings, from architecture and schematic capture through PCB layout, bring-up, and mass production.

This is a hands-on role at the extremes of miniaturization and power efficiency. You'll make architecture-level component decisions, drive high-density and RF layout, and take designs through NPI to volume — working closely with mechanical, firmware, and manufacturing teams on fast product cycles.

KEY RESPONSIBILITIES

Architecture & Schematic Design

• Translate product requirements into hardware architecture, then into schematics and manufacturable PCB designs using OrCAD / Allegro (Cadence).
• Own component selection across MCU/SoC, PMIC, sensor AFEs, and RF front-ends — balancing size, power, cost, and supply availability.
• Handle schematic-to-layout conversion and netlist import; create and maintain symbol/footprint libraries and land patterns.

High-Density & RF Layout

• Design and review high-density (HDI), rigid, and rigid-flex PCB layouts for space-constrained wearable form factors.
• Design 2.4 GHz BLE antennas and NFC coils, matching networks, and controlled-impedance routing; support antenna tuning and RF validation.
• Apply signal-integrity best practices for high-speed digital interfaces and mixed-signal boards.

Power & Low-Power Design

• Architect power trees around PMICs, buck/boost converters, and LDOs, including Li-ion charging for small-capacity cells.
• Build and validate ultra-low-power current budgets to meet multi-day battery-life targets.
• Strong grasp of power electronics and active/passive component behaviour.

Sensor Integration

• Integrate optical biosensing (PPG) AFEs, IMUs, temperature sensors, and haptics; own I²C/SPI interface design and analog front-end layout.

Manufacturing & DFM

• Own Gerber/ODB++ release, fabrication and assembly drawings, panelization, and full manufacturing data packages.
• Prepare and maintain BOMs; evaluate and qualify alternate / second-source components.
• Drive DFM/DFA reviews with fab and SMT/EMS partners; support NPI through EVT/DVT/PVT to mass production.
• Sound understanding of PCB materials, stackups, and component assembly processes.

Compliance, Reliability & Validation

• Apply EMI/EMC, thermal, and mechanical design best practices.
• Support pre-compliance and certification across FCC, CE, BIS, and RoHS, and familiarity with IEC standards for PCB design safety.
• Coordinate with test engineers on board bring-up and PCB validation; run circuit simulations for RF and signal/timing optimization.

Ownership & Collaboration

• Independently manage hardware projects end-to-end, including vendor coordination and delivery of final hardware.
• Collaborate with mechanical engineers to optimize designs and meet project timelines.
• Bring the latest design tools, methodologies, and industry best practices into the team.

REQUIRED QUALIFICATIONS

• Bachelor's or Master's in EEE, Electronics, or equivalent practical experience.
• 4+ years of hands-on hardware / PCB design experience, ideally in consumer electronics or wearables.
• Proficiency with a leading schematic and PCB toolchain (OrCAD / Allegro preferred).
• Proven track record taking a product from schematic through layout to volume production.
• Working knowledge of power electronics and active/passive component selection.
• Familiarity with global certifications (FCC, CE, BIS, RoHS) and IEC PCB safety standards.

PREFERRED / BONUS

• Experience with miniaturized high-density or rigid-flex designs.
• RF design experience (2.4 GHz / BLE, NFC, antenna tuning and matching).
• EMI/EMC design and pre-compliance testing experience.
• Low-power / battery-operated wearable product experience.
• Familiarity with reliability methods (DFMEA, derating) and RF / signal-timing circuit simulation.

Role: FPGA Design & Validation Engineer

Location: Kokapet, Hyderabad

Work Mode: Work from Office – 5 days/week

Key Requirements

• 5+ years of relevant experience in FPGA Design and Validation
• Hands-on experience validating FPGA designs on physical boards
• Experience with board-level debugging and hardware bring-up
• Hands-on experience using Oscilloscopes for hardware/debugging activities
• Experience with TCL scripting
• Good understanding of Lint and CDC (Clock Domain Crossing)
• Experience with Spirent or other traffic generator tools is an added advantage
• Knowledge of AI Agents and Prompt Engineering is a plus

The ideal candidate would have a combination of FPGA design, board-level validation, hardware debugging and lab testing experience.

Do you want to own the PMIC, PLL, and PCIe buffer architectures that ship in millions of vehicles? Do you want to build and lead the team solving India's toughest automotive power and clocking challenges?

Role: Head of Engineering

Level Five Cartronics | Fabless Automotive Semiconductor Design

Location: MG Road, Bengaluru, Karnataka, India (On-site)

About Us

Founded by serial Entrepreneurs, Level Five Cartronics is a fabless semiconductor design company headquartered in Bengaluru, building automotive-grade Power Management ICs (PMICs), high-precision oscillators, and high-performance phase-locked loops (PLLs) for the next generation of vehicle electronics. Our portfolio centres on low-EMI power delivery — including spread-spectrum EMI suppression — and low-jitter clocking and interface solutions for safety-critical solutions and infotainment systems. We design DC-DC converters, LDOs, and clock distribution networks (including low-jitter PCIe Gen 4, 5, and 6 buffers) in CMOS and BCD high-voltage processes across the 55nm, 90nm and 180nm nodes. We own our products end to end, from architecture through silicon characterization and productization, as part of India's growing fabless semiconductor ecosystem.

The Role

We are looking for a hands-on Head of Engineering, based at our Bengaluru headquarters, to lead our analog/mixed-signal design organization. This is a senior leadership position for an engineer who has personally taken complex automotive power, clocking, and high-speed interface products from concept to high-volume production — and who can build, mentor, and scale the cross-functional team that does it again and again.

You will set the technical direction for our PMIC, oscillator, PLL, and PCIe buffer roadmaps, own design quality and tape-out readiness, and partner closely with characterization, product, and test engineering to ensure every product meets stringent automotive reliability, jitter, and EMC requirements.

What You'll Do

1. Lead and grow the analog/mixed-signal design, layout, and verification teams across multiple product lines, based out of our Bengaluru engineering center.

2. Own the technical architecture and execution of automotive-grade PMICs, DC-DC converters, LDOs, low phase noise Fractional-N phase-locked loops (PLLs), and low-jitter PCIe Gen 4, 5, and 6 buffers.

3. Target high-speed interface applications by driving low phase noise PLL architectures explicitly optimized for PCIe Gen 4, 5, and 6 standards.

4. Drive designs across CMOS and BCD high-voltage processes at 55nm, 90nm and 180nm, from specification through tape-out and qualification.

5. Set and enforce design methodology, review gates, and tape-out criteria; review schematics, layout, and verification plans personally where it matters.

6. Partner with characterization engineers on lab bring-up, silicon debug, and correlation of measured results to simulation.

7. Work side by side with product engineers on productization, test development, yield, and sustaining.

8. Build and lead cross-functional teams; recruit, develop, and retain top analog and layout talent in India's semiconductor talent market.

9. Be a technical authority and final escalation point for difficult design and silicon issues.

What You'll Bring

- Minimum of 12 years (preferably more) of experience in analog/mixed-signal design, layout, and productization.

- Demonstrated track record of taped-out databases and shipping full products in volume, not just isolated blocks.

- Deep expertise across the full flow: schematic design, layout, and lab characterization (understanding how each one constrains the others).

- Hands-on design of DC-DC converters and LDOs in CMOS and BCD high-voltage processes.

- Expertise in clocking and interfaces: deep understanding of low phase noise design, Fractional-N PLL architectures, and low-jitter PCIe Gen 4, 5, and 6 clock buffers/drivers.

- Experience with PMICs, oscillators, and spread-spectrum / EMI suppression techniques.

- Strong working knowledge of the 55nm, 90nm and 180nm process nodes.

- Extensive experience with Cadence EDA tools across the design and verification flow.

- Mixed-signal behavioral modeling in Verilog (Verilog/Verilog-AMS).

- Proven history of working closely with characterization and product engineers through bring-up and ramp.

- Demonstrated success building, leading, and recruiting cross-functional engineering teams.

Nice to Have

- Automotive qualification experience (AEC-Q100, ISO 26262 / functional safety awareness).

- Strong EMC/EMI design and measurement background.

- Experience scaling an engineering organization in a fabless environment, ideally within India's semiconductor ecosystem.

Why Level Five Cartronics

You'll own real products in a fast-moving automotive market, work across the full design-to-silicon flow, and shape the engineering culture of a growing fabless company based in Bengaluru — one of India's leading semiconductor design hubs. If you've built power, clocking, and high-speed interface products that ship in cars and you want to lead the team that builds the next ones, we'd like to talk.

Level Five Cartronics is an equal opportunity employer.

Job Title: Software/Hardware Engineer (IIT/NIT)

Location: Bangalore

Website: https://www.zeuron.ai

Experience: 1 Year

CTC: 6-7 LPA

About the Company

Zeuron.ai is a Bangalore-based deep-tech startup founded in 2019, focused on building brain-inspired computing and AI-driven healthcare solutions. The company combines neuroscience, AI, and gaming to create innovative digital therapeutics and neurotechnology platforms for improving brain health, rehabilitation, and overall well-being.

About the Role

We are looking for a highly motivated Software/Hardware Engineer from premier institutes (IIT/NIT) with strong fundamentals and a passion for building scalable and efficient systems. This role offers an opportunity to work on cutting-edge technology and solve real-world problems.

Key Responsibilities

Design, develop, and optimize software/hardware solutions

Work on system architecture, debugging, and performance improvements

Collaborate with cross-functional teams (product, design, operations)

Participate in code reviews, testing, and deployment processes

Contribute to innovation and continuous improvement initiatives

Requirements

B.Tech/M.Tech from IITs/NITs (Computer Science, Electronics, Electrical, or related fields)

1 year of experience (internships/project experience considered)

Strong programming skills (C/C++/Python/Java) or hardware fundamentals (embedded systems, VLSI, circuit design)

Good understanding of data structures, algorithms, and system design

Problem-solving mindset with strong analytical skills

Preferred Skills

Experience with embedded systems, IoT, or product development

Knowledge of cloud platforms or system-level programming

Good in Computer vision, Flutter, JavaScript, AI/ML

✨ What we’re looking for:

✦ 8+ years of overall experience, with 5+ years in Defence or Aerospace.

✦ Strong hands-on engineering background — this is a technical pre-sales role, not a pure sales role.

✦ Experience across FPGA Design & Programming, RF Systems Engineering, Embedded Systems and Toolchains.

✦ Strong HW/SW integration experience — ability to read schematics, write firmware and debug at the hardware-software boundary.

✦ Experience in Pre-Sales, Application Engineering or Systems Integration, preferably working with DRDO / Defence PSUs / OEMs / Aerospace programmes.

✦ Ability to engage with hardware engineers, system architects and programme managers and understand technical challenges across radar, EW, NCW and embedded defence platforms.

✦ Strong ability to translate complex engineering problems into AI-driven technical solutions, and own the technical pre-sales journey from discovery through solution discussions.

🔐 Important: Candidate must be an Indian national and eligible for MoD security clearance.

🚀 What you’ll work on:

You’ll be the technical bridge between customer challenges such as slow RTL-to-software cycles, outdated toolchains and verification bottlenecks and the company’s AI-assisted engineering products.

You’ll work closely with DRDO clusters, DPSUs, Tier-1 OEMs/integrators and defence & aerospace customers.

• Provide technical job support for Automotive Embedded/ECU testing activities.
• Validate the MCU 5V reference voltage (VREF) under normal and fault conditions.
• Design and execute test cases for voltage monitoring and fault detection.
• Perform over-voltage and under-voltage fault injection.
• Monitor and validate Power-Good (PG) status during different voltage conditions.
• Capture and analyze ADC readings and compare them against expected values.
• Verify accurate detection of voltage-related faults.
• Validate ECU diagnostic behavior, fault codes, and reporting.
• Perform positive, negative, boundary, and fault-condition testing.
• Analyze test failures and perform root-cause analysis.
• Support debugging of ECU hardware/software issues.
• Review requirements, test specifications, and validation documents.
• Execute regression testing after software/firmware changes.
• Provide technical guidance and troubleshooting support as part of the job-support engagement.

Hello Everyone

ElevarSoC hiring for Bangalore, Hyderabad locations

3-6 years of experience with Good DFT concepts in SCAN INSERTION, ATPG and Simulations.

Good exposure to Synth, ATPG tools (Mentor) : DRC & coverage analysis, Timing/no timing (VCS) simulations.

Anyone already worked for Qcomm/product company is preferable.

Candidate should be independent in handling the given task.

Mandatory Skills:

ATPG trace (DRC), Stuck at and TDF Coverage Analysis

ATPG no timing and timing vector simulations

Apply now!!