Physical Integration Engineer at Bengaluru tech startup · Remote only · 6 - 11 years · ₹15L - ₹27L / yr · Remote only · Posted 26 Oct 2025

Physical Design Integration Engineer
Bengaluru, Karnataka, India
Role
Join our close-knit physical design team where you'll excel in synthesizing, placing, routing and integrating high speed designs. Experience the full spectrum of physical design and implementation, collaborating closely with the RTL team and integrating these blocks seamlessly into the full-chip architecture.
Minimum Skills & Qualifications
10+ years of physical design, integration & physical verification experience.
Strong knowledge of block level and full-chip physical verification methodology.
Experience with the complete physical design flow.
Skills in Design Compiler, Fusion Compiler, ICC2 or similar physical design tools
Expert with ICV or Calibre tools resolving block and full-chip DRC and LVS issues.
Expert with IR/EM analysis and resolution
Good understanding of full chip floor planning and integration.
Strong experience in full chip timing closure
Demonstrated ability to work with RTL teams to optimize for physical design
Ability to independently debug and resolve physical verification Issues
BS or MS in Electrical Engineering
Preferred Skills:
Knowledge of Synopsys tool suite is a plus.
Good scripting skills with languages like Tcl and Python. Ability to make flow enhancements.

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Hello Everyone
ElevarSoC hiring for Bangalore, Hyderabad locations
3-6 years of experience with Good DFT concepts in SCAN INSERTION, ATPG and Simulations.
Good exposure to Synth, ATPG tools (Mentor) : DRC & coverage analysis, Timing/no timing (VCS) simulations.
Anyone already worked for Qcomm/product company is preferable.
Candidate should be independent in handling the given task.
Mandatory Skills:
ATPG trace (DRC), Stuck at and TDF Coverage Analysis
ATPG no timing and timing vector simulations
Apply now!!







